aarch32_cpu/register/
mair1.rs

1//! Code for managing MAIR1 (*Memory Attribute Indirection Register 1*)
2
3use super::Mair;
4use crate::register::{SysReg, SysRegRead, SysRegWrite};
5
6/// MAIR1 (*Memory Attribute Indirection Register 1*)
7#[derive(Debug, Copy, Clone)]
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
10pub struct Mair1;
11
12impl SysReg for Mair1 {
13    const CP: u32 = 15;
14    const CRN: u32 = 10;
15    const OP1: u32 = 0;
16    const CRM: u32 = 2;
17    const OP2: u32 = 1;
18}
19
20impl crate::register::SysRegRead for Mair1 {}
21
22impl Mair1 {
23    #[inline]
24    /// Reads MAIR1 (*Memory Attribute Indirection Register 1*)
25    pub fn read() -> Mair {
26        Mair::new_with_raw_value(<Self as SysRegRead>::read_raw())
27    }
28}
29
30impl crate::register::SysRegWrite for Mair1 {}
31
32impl Mair1 {
33    #[inline]
34    /// Writes MAIR1 (*Memory Attribute Indirection Register 1*)
35    ///
36    /// # Safety
37    ///
38    /// Ensure that this value is appropriate for this register
39    pub unsafe fn write(value: Mair) {
40        unsafe {
41            <Self as SysRegWrite>::write_raw(value.raw_value());
42        }
43    }
44}
aarch32_cpu/register/mair1.rs

aarch32_cpu/register/
mair1.rs
