aarch32_cpu/register/
rgnr.rs

1//! Code for managing RGNR (*MPU Region Number Register*)
2
3use crate::register::{SysReg, SysRegRead};
4
5use super::SysRegWrite;
6
7/// RGNR (*MPU Region Number Register*)
8#[derive(Debug, Clone, Copy)]
9#[cfg_attr(feature = "defmt", derive(defmt::Format))]
10#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
11pub struct Rgnr(pub u32);
12
13impl SysReg for Rgnr {
14    const CP: u32 = 15;
15    const CRN: u32 = 6;
16    const OP1: u32 = 0;
17    const CRM: u32 = 2;
18    const OP2: u32 = 0;
19}
20
21impl crate::register::SysRegRead for Rgnr {}
22
23impl Rgnr {
24    #[inline]
25    /// Reads RGNR (*MPU Region Number Register*)
26    pub fn read() -> Rgnr {
27        unsafe { Self(<Self as SysRegRead>::read_raw()) }
28    }
29}
30
31impl crate::register::SysRegWrite for Rgnr {}
32
33impl Rgnr {
34    #[inline]
35    /// Writes RGNR (*MPU Region Number Register*)
36    ///
37    /// This affects what DRACR, IRACR, IRSR and DRSR give you.
38    pub fn write(value: Rgnr) {
39        unsafe { <Self as SysRegWrite>::write_raw(value.0) }
40    }
41}
aarch32_cpu/register/rgnr.rs

aarch32_cpu/register/
rgnr.rs
