aarch32_cpu/register/imp/
imp_tcmsyndr0.rs

1//! Code for managing IMP_TCMSYNDR0 (*TCM Syndrome Register 0*)
2
3use crate::register::{SysReg, SysRegRead};
4
5/// IMP_TCMSYNDR0 (*TCM Syndrome Register 0*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct ImpTcmsyndr0(pub u32);
10
11impl SysReg for ImpTcmsyndr0 {
12    const CP: u32 = 15;
13    const CRN: u32 = 15;
14    const OP1: u32 = 2;
15    const CRM: u32 = 2;
16    const OP2: u32 = 2;
17}
18
19impl crate::register::SysRegRead for ImpTcmsyndr0 {}
20
21impl ImpTcmsyndr0 {
22    #[inline]
23    /// Reads IMP_TCMSYNDR0 (*TCM Syndrome Register 0*)
24    pub fn read() -> ImpTcmsyndr0 {
25        unsafe { Self(<Self as SysRegRead>::read_raw()) }
26    }
27}