aarch32_cpu/register/imp/
imp_cdbgicd.rs

1//! Code for managing IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
2
3use crate::register::{SysReg, SysRegWrite};
4
5/// IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct ImpCdbgicd(pub u32);
10
11impl SysReg for ImpCdbgicd {
12    const CP: u32 = 15;
13    const CRN: u32 = 15;
14    const OP1: u32 = 3;
15    const CRM: u32 = 4;
16    const OP2: u32 = 1;
17}
18
19impl crate::register::SysRegWrite for ImpCdbgicd {}
20
21impl ImpCdbgicd {
22    #[inline]
23    /// Writes IMP_CDBGICD (*Instruction Cache Data Read Operation.*)
24    ///
25    /// # Safety
26    ///
27    /// Ensure that this value is appropriate for this register
28    pub unsafe fn write(value: Self) {
29        unsafe {
30            <Self as SysRegWrite>::write_raw(value.0);
31        }
32    }
33}