aarch32_cpu/register/imp/
imp_cbar.rs

1//! Code for managing IMP_CBAR (*Configuration Base Address Register*)
2
3use crate::register::{SysReg, SysRegRead};
4
5/// IMP_CBAR (*Configuration Base Address Register*)
6#[derive(Clone, Copy)]
7#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
8pub struct ImpCbar(pub u32);
9
10impl SysReg for ImpCbar {
11    const CP: u32 = 15;
12    const CRN: u32 = 15;
13    const OP1: u32 = 1;
14    const CRM: u32 = 3;
15    const OP2: u32 = 0;
16}
17
18impl SysRegRead for ImpCbar {}
19
20impl ImpCbar {
21    /// Read IMP_CBAR (*Configuration Base Address Register*)
22    #[inline]
23    pub fn read() -> ImpCbar {
24        // Safety: this read has no side-effects
25        unsafe { Self(<Self as SysRegRead>::read_raw()) }
26    }
27
28    /// Get the periphbase address
29    pub fn periphbase(self) -> *mut u32 {
30        (self.0 & 0xFFF00000) as *mut u32
31    }
32}
33
34impl core::fmt::Debug for ImpCbar {
35    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
36        write!(f, "IMP_CBAR {{ {:010p} }}", self.periphbase())
37    }
38}
39
40#[cfg(feature = "defmt")]
41impl defmt::Format for ImpCbar {
42    fn format(&self, f: defmt::Formatter) {
43        defmt::write!(f, "IMP_CBAR {{ 0x{=usize:08x} }}", self.0 as usize)
44    }
45}
aarch32_cpu/register/imp/imp_cbar.rs

aarch32_cpu/register/imp/
imp_cbar.rs
