aarch32_cpu/register/armv8r/
prselr.rs

1//! Code for managing PRSELR (*Protection Region Selection Register*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// PRSELR (*Protection Region Selection Register*)
6#[derive(Debug, Clone, Copy)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct Prselr(pub u32);
10
11impl SysReg for Prselr {
12    const CP: u32 = 15;
13    const CRN: u32 = 6;
14    const OP1: u32 = 0;
15    const CRM: u32 = 2;
16    const OP2: u32 = 1;
17}
18
19impl crate::register::SysRegRead for Prselr {}
20
21impl Prselr {
22    #[inline]
23    /// Reads PRSELR (*Protection Region Selection Register*)
24    pub fn read() -> Prselr {
25        unsafe { Self(<Self as SysRegRead>::read_raw()) }
26    }
27}
28
29impl crate::register::SysRegWrite for Prselr {}
30
31impl Prselr {
32    #[inline]
33    /// Writes PRSELR (*Protection Region Selection Register*)
34    ///
35    /// Controls what appears in PRLAR and PRBAR
36    pub fn write(value: Self) {
37        unsafe {
38            <Self as SysRegWrite>::write_raw(value.0);
39        }
40    }
41}
aarch32_cpu/register/armv8r/prselr.rs

aarch32_cpu/register/armv8r/
prselr.rs
