aarch32_cpu/register/armv8r/
hprbar12.rs

1//! Code for managing HPRBAR12 (*Hyp Protection Region Base Address Register 12*)
2
3use crate::register::{SysReg, SysRegRead, SysRegWrite};
4
5/// HPRBAR12 (*Hyp Protection Region Base Address Register 12*)
6#[derive(Debug, Copy, Clone)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct Hprbar12(pub u32);
10
11impl SysReg for Hprbar12 {
12    const CP: u32 = 15;
13    const CRN: u32 = 6;
14    const OP1: u32 = 4;
15    const CRM: u32 = 14;
16    const OP2: u32 = 0;
17}
18
19impl crate::register::SysRegRead for Hprbar12 {}
20
21impl Hprbar12 {
22    #[inline]
23    /// Reads HPRBAR12 (*Hyp Protection Region Base Address Register 12*)
24    pub fn read() -> Hprbar12 {
25        unsafe { Self(<Self as SysRegRead>::read_raw()) }
26    }
27}
28
29impl crate::register::SysRegWrite for Hprbar12 {}
30
31impl Hprbar12 {
32    #[inline]
33    /// Writes HPRBAR12 (*Hyp Protection Region Base Address Register 12*)
34    ///
35    /// # Safety
36    ///
37    /// Ensure that this value is appropriate for this register
38    pub unsafe fn write(value: Self) {
39        unsafe {
40            <Self as SysRegWrite>::write_raw(value.0);
41        }
42    }
43}