aarch32_cpu/register/armv8r/
cntpct.rs

1//! Code for managing CNTPCT (*Physical Counter-timer Count Register*)
2
3use crate::register::{SysReg64, SysRegRead64};
4
5/// CNTPCT (*Physical Counter-timer Count Register*)
6#[derive(Debug, Copy, Clone)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct CntPct(pub u64);
10
11impl SysReg64 for CntPct {
12    const CP: u32 = 15;
13    const OP1: u32 = 0;
14    const CRM: u32 = 14;
15}
16
17impl SysRegRead64 for CntPct {}
18
19impl CntPct {
20    #[inline]
21    /// Reads CNTPCT (*Physical Counter-timer Count Register*)
22    pub fn read() -> CntPct {
23        unsafe { Self(<Self as SysRegRead64>::read_raw()) }
24    }
25}