aarch32_cpu/register/armv8r/
cnthp_cval.rs

1//! Code for managing CNTHP_CVAL (*Hyp Physical Counter-timer CompareValue Register*)
2
3use crate::register::{SysReg64, SysRegRead64, SysRegWrite64};
4
5/// CNTHP_CVAL (*Hyp Physical Counter-timer CompareValue Register*)
6#[derive(Debug, Copy, Clone)]
7#[cfg_attr(feature = "defmt", derive(defmt::Format))]
8#[cfg_attr(feature = "serde", derive(serde::Serialize, serde::Deserialize))]
9pub struct CnthpCval(pub u64);
10
11impl SysReg64 for CnthpCval {
12    const CP: u32 = 15;
13    const OP1: u32 = 2;
14    const CRM: u32 = 14;
15}
16
17impl SysRegRead64 for CnthpCval {}
18
19impl CnthpCval {
20    #[inline]
21    /// Reads CNTHP_CVAL (*Hyp Physical Counter-timer CompareValue Register*)
22    pub fn read() -> CnthpCval {
23        unsafe { Self(<Self as SysRegRead64>::read_raw()) }
24    }
25}
26
27impl SysRegWrite64 for CnthpCval {}
28
29impl CnthpCval {
30    #[inline]
31    /// Writes CNTHP_CVAL (*Hyp Physical Counter-timer CompareValue Register*)
32    pub fn write(value: Self) {
33        unsafe {
34            <Self as SysRegWrite64>::write_raw(value.0);
35        }
36    }
37}