aarch32_cpu/
lib.rs

1//! CPU/peripheral support for Arm AArch32
2#![no_std]
3
4mod critical_section;
5
6#[cfg(any(
7    doc,
8    arm_architecture = "v7-a",
9    arm_architecture = "v7-r",
10    arm_architecture = "v8-r"
11))]
12#[path = "asmv7.rs"]
13pub mod asm;
14
15#[cfg(not(any(
16    doc,
17    arm_architecture = "v7-a",
18    arm_architecture = "v7-r",
19    arm_architecture = "v8-r"
20)))]
21#[path = "asmv4.rs"]
22pub mod asm;
23
24pub mod cache;
25pub mod interrupt;
26pub mod mmu;
27pub mod register;
28
29#[cfg(any(test, doc, arm_architecture = "v7-r"))]
30pub mod pmsav7;
31
32#[cfg(any(test, doc, arm_architecture = "v8-r"))]
33pub mod generic_timer;
34
35#[cfg(any(test, doc, arm_architecture = "v8-r"))]
36pub mod pmsav8;
37
38/// Generate an SVC call with the given argument.
39///
40/// Safe to call even in Supervisor (SupervisorCall) mode, as long as your Svc handler
41/// saves and restores SPSR_svc correctly.
42#[macro_export]
43macro_rules! svc {
44    ($r0:expr) => {
45        unsafe {
46            core::arch::asm!("svc {arg}", arg = const $r0, out("lr") _);
47        }
48    }
49}