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#[doc = "Reader of register SC1"] pub type R = crate::R<u32, super::SC1>; #[doc = "Writer for register SC1"] pub type W = crate::W<u32, super::SC1>; #[doc = "Register SC1 `reset()`'s with value 0x1f"] impl crate::ResetValue for super::SC1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x1f } } #[doc = "Input Channel Select\n\nValue on reset: 31"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum ADCH_A { #[doc = "22: Temperature Sensor"] _10110 = 22, #[doc = "23: Bandgap"] _10111 = 23, #[doc = "29: VREFH"] _11101 = 29, #[doc = "30: VREFL"] _11110 = 30, #[doc = "31: Module disabled Reset FIFO in FIFO mode."] _11111 = 31, } impl From<ADCH_A> for u8 { #[inline(always)] fn from(variant: ADCH_A) -> Self { variant as _ } } #[doc = "Reader of field `ADCH`"] pub type ADCH_R = crate::R<u8, ADCH_A>; impl ADCH_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, ADCH_A> { use crate::Variant::*; match self.bits { 22 => Val(ADCH_A::_10110), 23 => Val(ADCH_A::_10111), 29 => Val(ADCH_A::_11101), 30 => Val(ADCH_A::_11110), 31 => Val(ADCH_A::_11111), i => Res(i), } } #[doc = "Checks if the value of the field is `_10110`"] #[inline(always)] pub fn is_10110(&self) -> bool { *self == ADCH_A::_10110 } #[doc = "Checks if the value of the field is `_10111`"] #[inline(always)] pub fn is_10111(&self) -> bool { *self == ADCH_A::_10111 } #[doc = "Checks if the value of the field is `_11101`"] #[inline(always)] pub fn is_11101(&self) -> bool { *self == ADCH_A::_11101 } #[doc = "Checks if the value of the field is `_11110`"] #[inline(always)] pub fn is_11110(&self) -> bool { *self == ADCH_A::_11110 } #[doc = "Checks if the value of the field is `_11111`"] #[inline(always)] pub fn is_11111(&self) -> bool { *self == ADCH_A::_11111 } } #[doc = "Write proxy for field `ADCH`"] pub struct ADCH_W<'a> { w: &'a mut W, } impl<'a> ADCH_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ADCH_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Temperature Sensor"] #[inline(always)] pub fn _10110(self) -> &'a mut W { self.variant(ADCH_A::_10110) } #[doc = "Bandgap"] #[inline(always)] pub fn _10111(self) -> &'a mut W { self.variant(ADCH_A::_10111) } #[doc = "VREFH"] #[inline(always)] pub fn _11101(self) -> &'a mut W { self.variant(ADCH_A::_11101) } #[doc = "VREFL"] #[inline(always)] pub fn _11110(self) -> &'a mut W { self.variant(ADCH_A::_11110) } #[doc = "Module disabled Reset FIFO in FIFO mode."] #[inline(always)] pub fn _11111(self) -> &'a mut W { self.variant(ADCH_A::_11111) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | ((value as u32) & 0x1f); self.w } } #[doc = "Continuous Conversion Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum ADCO_A { #[doc = "0: One conversion following a write to the ADC_SC1 when software triggered operation is selected, or one conversion following assertion of ADHWT when hardware triggered operation is selected. When the FIFO function is enabled (AFDEP > 0), a set of conversions are triggered."] _0 = 0, #[doc = "1: Continuous conversions are initiated following a write to ADC_SC1 when software triggered operation is selected. Continuous conversions are initiated by an ADHWT event when hardware triggered operation is selected. When the FIFO function is enabled (AFDEP > 0), a set of conversions are loop triggered."] _1 = 1, } impl From<ADCO_A> for bool { #[inline(always)] fn from(variant: ADCO_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `ADCO`"] pub type ADCO_R = crate::R<bool, ADCO_A>; impl ADCO_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> ADCO_A { match self.bits { false => ADCO_A::_0, true => ADCO_A::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline(always)] pub fn is_0(&self) -> bool { *self == ADCO_A::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline(always)] pub fn is_1(&self) -> bool { *self == ADCO_A::_1 } } #[doc = "Write proxy for field `ADCO`"] pub struct ADCO_W<'a> { w: &'a mut W, } impl<'a> ADCO_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: ADCO_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "One conversion following a write to the ADC_SC1 when software triggered operation is selected, or one conversion following assertion of ADHWT when hardware triggered operation is selected. When the FIFO function is enabled (AFDEP > 0), a set of conversions are triggered."] #[inline(always)] pub fn _0(self) -> &'a mut W { self.variant(ADCO_A::_0) } #[doc = "Continuous conversions are initiated following a write to ADC_SC1 when software triggered operation is selected. Continuous conversions are initiated by an ADHWT event when hardware triggered operation is selected. When the FIFO function is enabled (AFDEP > 0), a set of conversions are loop triggered."] #[inline(always)] pub fn _1(self) -> &'a mut W { self.variant(ADCO_A::_1) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Interrupt Enable\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum AIEN_A { #[doc = "0: Conversion complete interrupt disabled."] _0 = 0, #[doc = "1: Conversion complete interrupt enabled."] _1 = 1, } impl From<AIEN_A> for bool { #[inline(always)] fn from(variant: AIEN_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `AIEN`"] pub type AIEN_R = crate::R<bool, AIEN_A>; impl AIEN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> AIEN_A { match self.bits { false => AIEN_A::_0, true => AIEN_A::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline(always)] pub fn is_0(&self) -> bool { *self == AIEN_A::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline(always)] pub fn is_1(&self) -> bool { *self == AIEN_A::_1 } } #[doc = "Write proxy for field `AIEN`"] pub struct AIEN_W<'a> { w: &'a mut W, } impl<'a> AIEN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: AIEN_A) -> &'a mut W { { self.bit(variant.into()) } } #[doc = "Conversion complete interrupt disabled."] #[inline(always)] pub fn _0(self) -> &'a mut W { self.variant(AIEN_A::_0) } #[doc = "Conversion complete interrupt enabled."] #[inline(always)] pub fn _1(self) -> &'a mut W { self.variant(AIEN_A::_1) } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Conversion Complete Flag\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] pub enum COCO_A { #[doc = "0: Conversion not completed."] _0 = 0, #[doc = "1: Conversion completed."] _1 = 1, } impl From<COCO_A> for bool { #[inline(always)] fn from(variant: COCO_A) -> Self { variant as u8 != 0 } } #[doc = "Reader of field `COCO`"] pub type COCO_R = crate::R<bool, COCO_A>; impl COCO_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> COCO_A { match self.bits { false => COCO_A::_0, true => COCO_A::_1, } } #[doc = "Checks if the value of the field is `_0`"] #[inline(always)] pub fn is_0(&self) -> bool { *self == COCO_A::_0 } #[doc = "Checks if the value of the field is `_1`"] #[inline(always)] pub fn is_1(&self) -> bool { *self == COCO_A::_1 } } impl R { #[doc = "Bits 0:4 - Input Channel Select"] #[inline(always)] pub fn adch(&self) -> ADCH_R { ADCH_R::new((self.bits & 0x1f) as u8) } #[doc = "Bit 5 - Continuous Conversion Enable"] #[inline(always)] pub fn adco(&self) -> ADCO_R { ADCO_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Interrupt Enable"] #[inline(always)] pub fn aien(&self) -> AIEN_R { AIEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Conversion Complete Flag"] #[inline(always)] pub fn coco(&self) -> COCO_R { COCO_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { #[doc = "Bits 0:4 - Input Channel Select"] #[inline(always)] pub fn adch(&mut self) -> ADCH_W { ADCH_W { w: self } } #[doc = "Bit 5 - Continuous Conversion Enable"] #[inline(always)] pub fn adco(&mut self) -> ADCO_W { ADCO_W { w: self } } #[doc = "Bit 6 - Interrupt Enable"] #[inline(always)] pub fn aien(&mut self) -> AIEN_W { AIEN_W { w: self } } }