1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 #[doc = "0x08 - slave mode control register"]
9 pub smcr: SMCR,
10 #[doc = "0x0c - DMA/Interrupt enable register"]
11 pub dier: DIER,
12 #[doc = "0x10 - status register"]
13 pub sr: SR,
14 #[doc = "0x14 - event generation register"]
15 pub egr: EGR,
16 _reserved_6_ccmr1: [u8; 0x04],
17 _reserved_7_ccmr2: [u8; 0x04],
18 #[doc = "0x20 - capture/compare enable register"]
19 pub ccer: CCER,
20 #[doc = "0x24 - counter"]
21 pub cnt: CNT,
22 #[doc = "0x28 - prescaler"]
23 pub psc: PSC,
24 #[doc = "0x2c - auto-reload register"]
25 pub arr: ARR,
26 #[doc = "0x30 - repetition counter register"]
27 pub rcr: RCR,
28 #[doc = "0x34 - capture/compare register 1"]
29 pub ccr1: CCR1,
30 #[doc = "0x38 - capture/compare register 2"]
31 pub ccr2: CCR2,
32 #[doc = "0x3c - capture/compare register 3"]
33 pub ccr3: CCR3,
34 #[doc = "0x40 - capture/compare register 4"]
35 pub ccr4: CCR4,
36 #[doc = "0x44 - break and dead-time register"]
37 pub bdtr: BDTR,
38 #[doc = "0x48 - DMA control register"]
39 pub dcr: DCR,
40 #[doc = "0x4c - DMA address for full transfer"]
41 pub dmar: DMAR,
42}
43impl RegisterBlock {
44 #[doc = "0x18 - capture/compare mode register 1 (input mode)"]
45 #[inline(always)]
46 pub fn ccmr1_input(&self) -> &CCMR1_INPUT {
47 unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_INPUT) }
48 }
49 #[doc = "0x18 - capture/compare mode register (output mode)"]
50 #[inline(always)]
51 pub fn ccmr1_output(&self) -> &CCMR1_OUTPUT {
52 unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_OUTPUT) }
53 }
54 #[doc = "0x1c - capture/compare mode register 2 (input mode)"]
55 #[inline(always)]
56 pub fn ccmr2_input(&self) -> &CCMR2_INPUT {
57 unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const CCMR2_INPUT) }
58 }
59 #[doc = "0x1c - capture/compare mode register (output mode)"]
60 #[inline(always)]
61 pub fn ccmr2_output(&self) -> &CCMR2_OUTPUT {
62 unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const CCMR2_OUTPUT) }
63 }
64}
65#[doc = "CR1 (rw) register accessor: an alias for `Reg<CR1_SPEC>`"]
66pub type CR1 = crate::Reg<cr1::CR1_SPEC>;
67#[doc = "control register 1"]
68pub mod cr1;
69#[doc = "CR2 (rw) register accessor: an alias for `Reg<CR2_SPEC>`"]
70pub type CR2 = crate::Reg<cr2::CR2_SPEC>;
71#[doc = "control register 2"]
72pub mod cr2;
73#[doc = "SMCR (rw) register accessor: an alias for `Reg<SMCR_SPEC>`"]
74pub type SMCR = crate::Reg<smcr::SMCR_SPEC>;
75#[doc = "slave mode control register"]
76pub mod smcr;
77#[doc = "DIER (rw) register accessor: an alias for `Reg<DIER_SPEC>`"]
78pub type DIER = crate::Reg<dier::DIER_SPEC>;
79#[doc = "DMA/Interrupt enable register"]
80pub mod dier;
81#[doc = "SR (rw) register accessor: an alias for `Reg<SR_SPEC>`"]
82pub type SR = crate::Reg<sr::SR_SPEC>;
83#[doc = "status register"]
84pub mod sr;
85#[doc = "EGR (w) register accessor: an alias for `Reg<EGR_SPEC>`"]
86pub type EGR = crate::Reg<egr::EGR_SPEC>;
87#[doc = "event generation register"]
88pub mod egr;
89#[doc = "CCMR1_Output (rw) register accessor: an alias for `Reg<CCMR1_OUTPUT_SPEC>`"]
90pub type CCMR1_OUTPUT = crate::Reg<ccmr1_output::CCMR1_OUTPUT_SPEC>;
91#[doc = "capture/compare mode register (output mode)"]
92pub mod ccmr1_output;
93#[doc = "CCMR1_Input (rw) register accessor: an alias for `Reg<CCMR1_INPUT_SPEC>`"]
94pub type CCMR1_INPUT = crate::Reg<ccmr1_input::CCMR1_INPUT_SPEC>;
95#[doc = "capture/compare mode register 1 (input mode)"]
96pub mod ccmr1_input;
97#[doc = "CCMR2_Output (rw) register accessor: an alias for `Reg<CCMR2_OUTPUT_SPEC>`"]
98pub type CCMR2_OUTPUT = crate::Reg<ccmr2_output::CCMR2_OUTPUT_SPEC>;
99#[doc = "capture/compare mode register (output mode)"]
100pub mod ccmr2_output;
101#[doc = "CCMR2_Input (rw) register accessor: an alias for `Reg<CCMR2_INPUT_SPEC>`"]
102pub type CCMR2_INPUT = crate::Reg<ccmr2_input::CCMR2_INPUT_SPEC>;
103#[doc = "capture/compare mode register 2 (input mode)"]
104pub mod ccmr2_input;
105#[doc = "CCER (rw) register accessor: an alias for `Reg<CCER_SPEC>`"]
106pub type CCER = crate::Reg<ccer::CCER_SPEC>;
107#[doc = "capture/compare enable register"]
108pub mod ccer;
109#[doc = "CNT (rw) register accessor: an alias for `Reg<CNT_SPEC>`"]
110pub type CNT = crate::Reg<cnt::CNT_SPEC>;
111#[doc = "counter"]
112pub mod cnt;
113#[doc = "PSC (rw) register accessor: an alias for `Reg<PSC_SPEC>`"]
114pub type PSC = crate::Reg<psc::PSC_SPEC>;
115#[doc = "prescaler"]
116pub mod psc;
117#[doc = "ARR (rw) register accessor: an alias for `Reg<ARR_SPEC>`"]
118pub type ARR = crate::Reg<arr::ARR_SPEC>;
119#[doc = "auto-reload register"]
120pub mod arr;
121#[doc = "RCR (rw) register accessor: an alias for `Reg<RCR_SPEC>`"]
122pub type RCR = crate::Reg<rcr::RCR_SPEC>;
123#[doc = "repetition counter register"]
124pub mod rcr;
125#[doc = "CCR1 (rw) register accessor: an alias for `Reg<CCR1_SPEC>`"]
126pub type CCR1 = crate::Reg<ccr1::CCR1_SPEC>;
127#[doc = "capture/compare register 1"]
128pub mod ccr1;
129#[doc = "CCR2 (rw) register accessor: an alias for `Reg<CCR2_SPEC>`"]
130pub type CCR2 = crate::Reg<ccr2::CCR2_SPEC>;
131#[doc = "capture/compare register 2"]
132pub mod ccr2;
133#[doc = "CCR3 (rw) register accessor: an alias for `Reg<CCR3_SPEC>`"]
134pub type CCR3 = crate::Reg<ccr3::CCR3_SPEC>;
135#[doc = "capture/compare register 3"]
136pub mod ccr3;
137#[doc = "CCR4 (rw) register accessor: an alias for `Reg<CCR4_SPEC>`"]
138pub type CCR4 = crate::Reg<ccr4::CCR4_SPEC>;
139#[doc = "capture/compare register 4"]
140pub mod ccr4;
141#[doc = "BDTR (rw) register accessor: an alias for `Reg<BDTR_SPEC>`"]
142pub type BDTR = crate::Reg<bdtr::BDTR_SPEC>;
143#[doc = "break and dead-time register"]
144pub mod bdtr;
145#[doc = "DCR (rw) register accessor: an alias for `Reg<DCR_SPEC>`"]
146pub type DCR = crate::Reg<dcr::DCR_SPEC>;
147#[doc = "DMA control register"]
148pub mod dcr;
149#[doc = "DMAR (rw) register accessor: an alias for `Reg<DMAR_SPEC>`"]
150pub type DMAR = crate::Reg<dmar::DMAR_SPEC>;
151#[doc = "DMA address for full transfer"]
152pub mod dmar;