MSPM0L1306_HAL/
nvic.rs

1
2use cortex_m; // I think this is what allows us to create main
3
4use cortex_m_rt::exception; // I think this is what allows us to create main
5
6use mspm0l130x as pac;
7
8use cortex_m::interrupt;
9pub unsafe trait InterruptNumber: Copy {
10    /// Return the interrupt number associated with this variant.
11    ///
12    /// See trait documentation for safety requirements.
13    fn number(self) -> u16;
14}
15
16
17pub struct NVIC;
18
19impl NVIC{
20    
21
22    pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8)
23    where
24        I: InterruptNumber,
25    {
26
27        pac::CorePeripherals::steal().NVIC.icer[1].write(0x03);
28        //let abda = (0x01 as u32) as InterruptNumber;
29        //let inmb: interrupt::InterruptNumber = cortex_m::interrupt::InterruptNumber::new(interrupt.number());
30        //cortex_m::Peripherals::take().unwrap().NVIC.set_priority(cortex_m::interrupt::InterruptNumber::new(interrupt.number()), prio);
31    }
32    
33
34
35    //macro for all iser icer ispr icpr values
36
37
38
39
40
41}
42
43
44
45#[macro_export]
46macro_rules! generate_nvic_functions {
47    ($($function:ident, $vall:expr),*) => {
48        $(
49            impl NVIC {
50                
51               pub fn set_ $function _$vall (value: u32) {
52                    unsafe{
53                    pac::Peripherals::steal().$struct_name.$function.write(|w| w.bits(value));
54                    }
55                }
56
57                pub fn get_ $function _$vall (value: u32) {
58                    unsafe{
59                    pac::Peripherals::steal().$struct_name.$function.write(|w| w.bits(value));
60                    }
61                }
62
63            
64
65            }
66        )*
67    };
68}
MSPM0L1306_HAL/nvic.rs

MSPM0L1306_HAL/
nvic.rs
