Struct rk3399_pac::Rga2

pub struct Rga2 { /* private fields */ }

Rockchip Graphics Accelerator 2 (RGA2) Registers

Implementations

impl Rga2

pub const PTR: *const RegisterBlock = {0xff680000 as *const rga2::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn sys_ctrl(&self) -> &SysCtrl

0x00 - RGA system control register

pub fn cmd_ctrl(&self) -> &CmdCtrl

0x04 - RGA command control register

pub fn cmd_base(&self) -> &CmdBase

0x08 - RGA command codes base address register

pub fn status1(&self) -> &Status1

0x0c - RGA status register

pub fn int(&self) -> &Int

0x10 - RGA interrupt register

pub fn mmu_ctrl0(&self) -> &MmuCtrl0

0x14 - RGA MMU control 0 register

pub fn mmu_cmd_base(&self) -> &MmuCmdBase

0x18 - Register0000 Abstract

pub fn status2(&self) -> &Status2

0x1c - RGA status register

pub fn work_cnt(&self) -> &WorkCnt

0x20 - work counter

pub fn version_info(&self) -> &VersionInfo

0x28 - Version number for rga

pub fn perf_latency_ctrl0(&self) -> &PerfLatencyCtrl0

0x40 - Axi performance latency module contrl register0

pub fn perf_latency_ctrl1(&self) -> &PerfLatencyCtrl1

0x44 - PERF_LATENCY_CTRL1

pub fn perf_rd_max_latency_num0(&self) -> &PerfRdMaxLatencyNum0

0x48 - Read max latency number

pub fn perf_rd_latency_samp_num(&self) -> &PerfRdLatencySampNum

0x4c - The number of bigger than configed threshold value

pub fn perf_rd_latency_acc_sum(&self) -> &PerfRdLatencyAccSum

0x50 - Total sample number

pub fn perf_rd_axi_total_byte(&self) -> &PerfRdAxiTotalByte

0x54 - perf_rd_axi_total_byte

pub fn perf_wr_axi_total_byte(&self) -> &PerfWrAxiTotalByte

0x58 - perf_wr_axi_total_byte

pub fn perf_working_cnt(&self) -> &PerfWorkingCnt

0x5c - perf_working_cnt

pub fn mode_ctrl(&self) -> &ModeCtrl

0x100 - RGA mode control register

pub fn src_info(&self) -> &SrcInfo

0x104 - RGA source information register

pub fn src_base0(&self) -> &SrcBase0

0x108 - source image Y/RGB base address

pub fn src_base1(&self) -> &SrcBase1

0x10c - RGA source image Cb/Cbr base address register

pub fn src_base2(&self) -> &SrcBase2

0x110 - RGA source image Cr base address register

pub fn src_base3(&self) -> &SrcBase3

0x114 - RGA source image 1 base address register

pub fn src_vir_info(&self) -> &SrcVirInfo

0x118 - RGA source image virtual stride / RGA source image tile number

pub fn src_act_info(&self) -> &SrcActInfo

0x11c - RGA source image active width/height register

pub fn src_x_factor(&self) -> &SrcXFactor

0x120 - RGA source image horizontal scaling factor

pub fn src_y_factor(&self) -> &SrcYFactor

0x124 - RGA source image vertical scaling factor

pub fn src_bg_color(&self) -> &SrcBgColor

0x128 - RGA source image background color

pub fn src_fg_color(&self) -> &SrcFgColor

0x12c - RGA source image foreground color

pub fn cp_gr_a(&self) -> &CpGrA

0x130 - RGA source image transparency color min value

pub fn src_tr_color0(&self) -> &SrcTrColor0

0x130 - RGA source image transparency color min value

pub fn cp_gr_b(&self) -> &CpGrB

0x134 - RGA source image transparency color max value

pub fn src_tr_color1(&self) -> &SrcTrColor1

0x134 - Register0000 Abstract

pub fn dst_info(&self) -> &DstInfo

0x138 - RGA destination format register

pub fn dst_base0(&self) -> &DstBase0

0x13c - RGA destination image base address 0 register

pub fn dst_base1(&self) -> &DstBase1

0x140 - RGA destination image base address 1 register

pub fn dst_base2(&self) -> &DstBase2

0x144 - RGA destination image base address 2 register

pub fn dst_vir_info(&self) -> &DstVirInfo

0x148 - RGA destination image virtual width/height register

pub fn dst_act_info(&self) -> &DstActInfo

0x14c - RGA destination image active width/height register

pub fn alpha_ctrl0(&self) -> &AlphaCtrl0

0x150 - Alpha control register 0

pub fn alpha_ctrl1(&self) -> &AlphaCtrl1

0x154 - Register0000 Abstract

pub fn fading_ctrl(&self) -> &FadingCtrl

0x158 - Fading control register

pub fn pat_con(&self) -> &PatCon

0x15c - Pattern size/offset register

pub fn cp_gr_g(&self) -> &CpGrG

0x160 - RGA color gradient fill step register (color fill mode)

pub fn rop_con0(&self) -> &RopCon0

0x160 - ROP code 0 control register

pub fn cp_gr_r(&self) -> &CpGrR

0x164 - RGA color gradient fill step register (color fill mode)

pub fn rop_con1(&self) -> &RopCon1

0x164 - ROP code 1 control register

pub fn mask_base(&self) -> &MaskBase

0x168 - RGA mask base address register

pub fn mmu_ctrl1(&self) -> &MmuCtrl1

0x16c - RGA MMU control register 1

pub fn mmu_src_base(&self) -> &MmuSrcBase

0x170 - RGA source MMU TLB base address

pub fn mmu_src1_base(&self) -> &MmuSrc1Base

0x174 - RGA source1 MMU TLB base address

pub fn mmu_dst_base(&self) -> &MmuDstBase

0x178 - RGA destination MMU TLB base address

pub fn mmu_els_base(&self) -> &MmuElsBase

0x17c - RGA ELSE MMU TLB base address

Trait Implementations

impl Debug for Rga2

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for Rga2

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for Rga2