Struct rk3399_pac::PcieClient

pub struct PcieClient { /* private fields */ }

PCIe Client Registers

Implementations

impl PcieClient

pub const PTR: *const RegisterBlock = {0xfd000000 as *const pcie_client::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn basic_strap_conf(&self) -> &BasicStrapConf

0x00 - Basic strap configuration register

pub fn power_ctrl(&self) -> &PowerCtrl

0x04 - PCIe client power control configuration

pub fn power_status(&self) -> &PowerStatus

0x08 - PCIe power management status

pub fn legacy_int_ctrl(&self) -> &LegacyIntCtrl

0x0c - Legacy interrupt control

pub fn err_ctrl(&self) -> &ErrCtrl

0x10 - Error control register

pub fn err_cnt(&self) -> &ErrCnt

0x14 - Error counter

pub fn hot_reset_ctrl(&self) -> &HotResetCtrl

0x18 - Hot reset control

pub fn side_band_ctrl(&self) -> &SideBandCtrl

0x1c - Side band control configuration

pub fn side_band_status(&self) -> &SideBandStatus

0x20 - Side band status

pub fn fc_level_rst_done(&self) -> &FcLevelRstDone

0x24 - Generate function level reset done pulse

pub fn flr_status(&self) -> &FlrStatus

0x28 - Function level reset status

pub fn vf_status(&self) -> &VfStatus

0x2c - Virtual function status

pub fn vf_pwr_status(&self) -> &VfPwrStatus

0x30 - Virtual function power status

pub fn vf_tph_status(&self) -> &VfTphStatus

0x34 - Virtual function TPH status

pub fn tph_status(&self) -> &TphStatus

0x38 - Physical TPH status

pub fn debug_out_0(&self) -> &DebugOut0

0x3c - Debug information 0

pub fn debug_out_1(&self) -> &DebugOut1

0x40 - Debug information 1

pub fn basic_status0(&self) -> &BasicStatus0

0x44 - Basic status 0

pub fn basic_status1(&self) -> &BasicStatus1

0x48 - Basic status 1

pub fn int_mask(&self) -> &IntMask

0x4c - Interrupt mask

pub fn int_status(&self) -> &IntStatus

0x50 - Interrupt status

pub fn msg_ctrl(&self) -> &MsgCtrl

0x54 - Message receive control register

pub fn msg_status(&self) -> &MsgStatus

0x58 - Message control status

pub fn msg_code0(&self) -> &MsgCode0

0x5c - Message code 0

pub fn msg_code1(&self) -> &MsgCode1

0x60 - Message code 1

pub fn msg_data_len(&self) -> &MsgDataLen

0x64 - Message data length

pub fn msg_fifo_rd_data(&self) -> &MsgFifoRdData

0x100 - Message fifo read data

Trait Implementations

impl Debug for PcieClient

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for PcieClient

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for PcieClient