Struct rk3399_pac::MipiDsiHost0

pub struct MipiDsiHost0 { /* private fields */ }

MIPI Display Serial Interface (DSI) Host 0 Registers

Implementations

impl MipiDsiHost0

pub const PTR: *const RegisterBlock = {0xff960000 as *const mipi_dsi_host::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn version(&self) -> &Version

0x00 - VERSION

pub fn pwr_up(&self) -> &PwrUp

0x04 - PWR_UP

pub fn clkmgr_cfg(&self) -> &ClkmgrCfg

0x08 - Internal Clock Dividers Configuration Register

pub fn dpi_vcid(&self) -> &DpiVcid

0x0c - DPI Virtual Channel ID Register

pub fn dpi_color_coding(&self) -> &DpiColorCoding

0x10 - DPI Color Coding Register

pub fn dpi_cfg_pol(&self) -> &DpiCfgPol

0x14 - DPI Polarity Configuration Register

pub fn dpi_lp_cmd_tim(&self) -> &DpiLpCmdTim

0x18 - Low-Power Command Timing Configuration Register

pub fn pckhdl_cfg(&self) -> &PckhdlCfg

0x2c - Packet Handler Configuration Register

pub fn gen_vcid(&self) -> &GenVcid

0x30 - Generic Interface Virtual Channel Id Register

pub fn mode_cfg(&self) -> &ModeCfg

0x34 - Register0000 Abstract

pub fn vid_mode_cfg(&self) -> &VidModeCfg

0x38 - Video Mode Configuration Register

pub fn vid_pkt_size(&self) -> &VidPktSize

0x3c - Video Packet Size Register

pub fn vid_num_chunks(&self) -> &VidNumChunks

0x40 - Number Of Chunks Register

pub fn vid_null_size(&self) -> &VidNullSize

0x44 - Null Packet Size Register

pub fn vid_hsa_time(&self) -> &VidHsaTime

0x48 - Horizontal Sync Active Time Register

pub fn vid_hbp_time(&self) -> &VidHbpTime

0x4c - Register0005 Abstract

pub fn vid_hline_time(&self) -> &VidHlineTime

0x50 - Line Time Register

pub fn vid_vsa_lines(&self) -> &VidVsaLines

0x54 - VID_VSA_LINES

pub fn vid_vbp_lines(&self) -> &VidVbpLines

0x58 - Vertical Back Porch Period Register

pub fn vid_vfp_lines(&self) -> &VidVfpLines

0x5c - Vertical Front Porch Period Register

pub fn vid_vactive_lines(&self) -> &VidVactiveLines

0x60 - Vertical Resolution Register

pub fn edpi_cmd_size(&self) -> &EdpiCmdSize

0x64 - eDPI Packet Size Register

pub fn cmd_mode_cfg(&self) -> &CmdModeCfg

0x68 - Command Mode Configuration Register

pub fn gen_hdr(&self) -> &GenHdr

0x6c - Generic Packet Header Configuration Register

pub fn gen_pld_data(&self) -> &GenPldData

0x70 - Generic Payload Data In And Out Register

pub fn cmd_pkt_status(&self) -> &CmdPktStatus

0x74 - Command Packet Status Register

pub fn to_cnt_cfg(&self) -> &ToCntCfg

0x78 - Timeout Timers Configuration Register

pub fn hs_rd_to_cnt(&self) -> &HsRdToCnt

0x7c - Peripheral Response Timeout Definition after Hi

pub fn lp_rd_to_cnt(&self) -> &LpRdToCnt

0x80 - Peripheral Response Timeout Definition after Lo

pub fn hs_wr_to_cnt(&self) -> &HsWrToCnt

0x84 - Peripheral Response Timeout Definition after Hi

pub fn lp_wr_to_cnt(&self) -> &LpWrToCnt

0x88 - Peripheral Response Timeout Definition after Lo

pub fn bta_to_cnt(&self) -> &BtaToCnt

0x8c - Peripheral Response Timeout Definition after B

pub fn lpclk_ctrl(&self) -> &LpclkCtrl

0x94 - Low-power in Clock Lane Register

pub fn phy_tmr_lpclk_cfg(&self) -> &PhyTmrLpclkCfg

0x98 - D-PHY Timing Configuration for the Clock Lane

pub fn phy_tmr_cfg(&self) -> &PhyTmrCfg

0x9c - D-PHY Data Lanes Timing Configuration Registe

pub fn phy_rstz(&self) -> &PhyRstz

0xa0 - D-PHY Reset Control Register

pub fn phy_if_cfg(&self) -> &PhyIfCfg

0xa4 - D-PHY Interface Configuration Register

pub fn phy_ulps_ctrl(&self) -> &PhyUlpsCtrl

0xa8 - D-PHY Ultra Low-Power Control Register

pub fn phy_tx_triggers(&self) -> &PhyTxTriggers

0xac - D-PHY Transmit Triggers Register

pub fn phy_status(&self) -> &PhyStatus

0xb0 - Register0010 Abstract

pub fn phy_tst_ctrl0(&self) -> &PhyTstCtrl0

0xb4 - D-PHY Test Interface Control 0 Register

pub fn phy_tst_ctrl1(&self) -> &PhyTstCtrl1

0xb8 - D-PHY Test Interface Control 1 Register

pub fn int_st0(&self) -> &IntSt0

0xbc - Interrupt Status Register 0

pub fn int_st1(&self) -> &IntSt1

0xc0 - Interrupt Status Register 1

pub fn int_msk0(&self) -> &IntMsk0

0xc4 - Masks the Interrupt Generation Triggered by the

pub fn int_msk1(&self) -> &IntMsk1

0xc8 - Masks the Interrupt Generation Triggered by the

pub fn int_force0(&self) -> &IntForce0

0xd8 - Force Interrupt Configuration Register

pub fn int_force1(&self) -> &IntForce1

0xdc - Force Interrupt Configuration Register

Trait Implementations

impl Debug for MipiDsiHost0

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for MipiDsiHost0

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for MipiDsiHost0