Crate zynq7000_hal 

HAL for the AMD Zynq 7000 SoC family

This repository contains the Hardware Abstraction Layer (HAL), which is an additional hardware abstraction on top of the peripheral access API.

It is the result of reading the datasheet for the device and encoding a type-safe layer over the raw PAC. This crate also implements traits specified by the embedded-hal project, making it compatible with various drivers in the embedded rust ecosystem.

Features

• defmt - Activates defmt support for various data structures
• 7z010-7z007s-clg225 - Chip variant which has a lower pin count
• time-driver-gtc - Access to the embassy-time driver API which uses the global timer counter (GTC).
• alloc - Enables extern crate alloc and APIs which need it
• first-segment-ddr-attr - Maps the first 1 MB MMU segment with the DDR memory attribute instead of the OCM one, to allow accessing DDR through addresses 0x8000 to 0x10_0000. See mmu::section_attrs::FIRST_SEGMENT.

Examples

All examples can be found inside the examples folder and firmware folder of the project

Re-exports

pub use slcr::Slcr;

pub use gic::Interrupt;

pub use gic::PpiInterrupt;

pub use gic::SpiInterrupt;

pub use interrupt::generic_interrupt_handler;

pub use interrupt::register_interrupt;

pub use zynq7000 as pac;

Modules

cache

Cache management module

clocks

Clock module

ddr

DDR module

eth

Ethernet module

gic

Global Interrupt Controller (GIC) module

gpio

GPIO module

gtc

Global timer counter driver module

i2c

I2C module

interrupt

l2_cache

L2 cache module

log

Simple logging providers

mmu

The overview of translation table memory attributes is described below.

mmu_table

This file was auto-generated by table-gen.rs

pl

Programmable Logic (PL) support module.

prelude

Prelude

priv_tim

CPU private timer module

qspi

QSPI module

sd

slcr

System Level Control Register (SLCR) module

spi

SPI module

time

Time units

time_driver_gtctime-driver-gtc

Embassy time support for the AMD Zynq7000 SoC family using the global timer counter (GTC).

ttc

Triple-timer counter (TTC) high-level driver

uart

UART module

Macros

uprint

Writes directly to the currently active logger, with no line ending appended and no log crate level prefix or filtering.

uprintln

Like uprint, but appends \r\n.

Structs

BootMode

Config

SecondaryCoreConfig

Configuration for init_secondary_core.

Enums

BootDevice

This enumeration encodes the various boot sources.

CoreId

Identifies one of the two physical Cortex-A9 cores.

InitError

InteruptConfig

LevelShifterConfig

PeriphSelect

SecondaryCoreInitError

Functions

configure_level_shifter

This configures the level shifters between the programmable logic (PL) and the processing system (PS).

core_id

Reads the ID of the core this is called on, from MPIDR’s affinity level 0 field.

disable_amba_periph_clk

Disable the AMBA peripheral clock, which is required to read the registers of a peripheral block.

enable_amba_peripheral_clock

Enable the AMBA peripheral clock, which is required to read the registers of a peripheral block.

init

Utility function to perform common initialization steps.

init_secondary_core

Utility function to perform common initialization steps on a secondary core.