Module xmc4800::usic0_ch0::dx2cr

Input Control Register 2

Structs

• DX2CR_SPEC
  Input Control Register 2

Enums

• CM_A
  Combination Mode
• DFEN_A
  Digital Filter Enable
• DPOL_A
  Data Polarity for DXn
• DSEL_A
  Data Selection for Input Signal
• DSEN_A
  Data Synchronization Enable
• DXS_A
  Synchronized Data Value
• INSW_A
  Input Switch
• SFSEL_A
  Sampling Frequency Selection

Type Aliases

• CM_R
  Field CM reader - Combination Mode
• CM_W
  Field CM writer - Combination Mode
• DFEN_R
  Field DFEN reader - Digital Filter Enable
• DFEN_W
  Field DFEN writer - Digital Filter Enable
• DPOL_R
  Field DPOL reader - Data Polarity for DXn
• DPOL_W
  Field DPOL writer - Data Polarity for DXn
• DSEL_R
  Field DSEL reader - Data Selection for Input Signal
• DSEL_W
  Field DSEL writer - Data Selection for Input Signal
• DSEN_R
  Field DSEN reader - Data Synchronization Enable
• DSEN_W
  Field DSEN writer - Data Synchronization Enable
• DXS_R
  Field DXS reader - Synchronized Data Value
• INSW_R
  Field INSW reader - Input Switch
• INSW_W
  Field INSW writer - Input Switch
• R
  Register DX2CR reader
• SFSEL_R
  Field SFSEL reader - Sampling Frequency Selection
• SFSEL_W
  Field SFSEL writer - Sampling Frequency Selection
• W
  Register DX2CR writer