#[doc = "Register `MIRRSTS` reader"]
pub type R = crate::R<MIRRSTS_SPEC>;
#[doc = "HDCLR Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum HDCLR_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<HDCLR_A> for bool {
#[inline(always)]
fn from(variant: HDCLR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `HDCLR` reader - HDCLR Mirror Register Write Status"]
pub type HDCLR_R = crate::BitReader<HDCLR_A>;
impl HDCLR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> HDCLR_A {
match self.bits {
false => HDCLR_A::VALUE1,
true => HDCLR_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == HDCLR_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == HDCLR_A::VALUE2
}
}
#[doc = "HDSET Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum HDSET_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<HDSET_A> for bool {
#[inline(always)]
fn from(variant: HDSET_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `HDSET` reader - HDSET Mirror Register Write Status"]
pub type HDSET_R = crate::BitReader<HDSET_A>;
impl HDSET_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> HDSET_A {
match self.bits {
false => HDSET_A::VALUE1,
true => HDSET_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == HDSET_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == HDSET_A::VALUE2
}
}
#[doc = "HDCR Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum HDCR_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<HDCR_A> for bool {
#[inline(always)]
fn from(variant: HDCR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `HDCR` reader - HDCR Mirror Register Write Status"]
pub type HDCR_R = crate::BitReader<HDCR_A>;
impl HDCR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> HDCR_A {
match self.bits {
false => HDCR_A::VALUE1,
true => HDCR_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == HDCR_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == HDCR_A::VALUE2
}
}
#[doc = "OSCSICTRL Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum OSCSICTRL_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<OSCSICTRL_A> for bool {
#[inline(always)]
fn from(variant: OSCSICTRL_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `OSCSICTRL` reader - OSCSICTRL Mirror Register Write Status"]
pub type OSCSICTRL_R = crate::BitReader<OSCSICTRL_A>;
impl OSCSICTRL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> OSCSICTRL_A {
match self.bits {
false => OSCSICTRL_A::VALUE1,
true => OSCSICTRL_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == OSCSICTRL_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == OSCSICTRL_A::VALUE2
}
}
#[doc = "OSCULCTRL Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum OSCULCTRL_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<OSCULCTRL_A> for bool {
#[inline(always)]
fn from(variant: OSCULCTRL_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `OSCULCTRL` reader - OSCULCTRL Mirror Register Write Status"]
pub type OSCULCTRL_R = crate::BitReader<OSCULCTRL_A>;
impl OSCULCTRL_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> OSCULCTRL_A {
match self.bits {
false => OSCULCTRL_A::VALUE1,
true => OSCULCTRL_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == OSCULCTRL_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == OSCULCTRL_A::VALUE2
}
}
#[doc = "RTC CTR Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_CTR_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_CTR_A> for bool {
#[inline(always)]
fn from(variant: RTC_CTR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_CTR` reader - RTC CTR Mirror Register Write Status"]
pub type RTC_CTR_R = crate::BitReader<RTC_CTR_A>;
impl RTC_CTR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_CTR_A {
match self.bits {
false => RTC_CTR_A::VALUE1,
true => RTC_CTR_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_CTR_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_CTR_A::VALUE2
}
}
#[doc = "RTC ATIM0 Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_ATIM0_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_ATIM0_A> for bool {
#[inline(always)]
fn from(variant: RTC_ATIM0_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_ATIM0` reader - RTC ATIM0 Mirror Register Write Status"]
pub type RTC_ATIM0_R = crate::BitReader<RTC_ATIM0_A>;
impl RTC_ATIM0_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_ATIM0_A {
match self.bits {
false => RTC_ATIM0_A::VALUE1,
true => RTC_ATIM0_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_ATIM0_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_ATIM0_A::VALUE2
}
}
#[doc = "RTC ATIM1 Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_ATIM1_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_ATIM1_A> for bool {
#[inline(always)]
fn from(variant: RTC_ATIM1_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_ATIM1` reader - RTC ATIM1 Mirror Register Write Status"]
pub type RTC_ATIM1_R = crate::BitReader<RTC_ATIM1_A>;
impl RTC_ATIM1_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_ATIM1_A {
match self.bits {
false => RTC_ATIM1_A::VALUE1,
true => RTC_ATIM1_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_ATIM1_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_ATIM1_A::VALUE2
}
}
#[doc = "RTC TIM0 Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_TIM0_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_TIM0_A> for bool {
#[inline(always)]
fn from(variant: RTC_TIM0_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_TIM0` reader - RTC TIM0 Mirror Register Write Status"]
pub type RTC_TIM0_R = crate::BitReader<RTC_TIM0_A>;
impl RTC_TIM0_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_TIM0_A {
match self.bits {
false => RTC_TIM0_A::VALUE1,
true => RTC_TIM0_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_TIM0_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_TIM0_A::VALUE2
}
}
#[doc = "RTC TIM1 Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_TIM1_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_TIM1_A> for bool {
#[inline(always)]
fn from(variant: RTC_TIM1_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_TIM1` reader - RTC TIM1 Mirror Register Write Status"]
pub type RTC_TIM1_R = crate::BitReader<RTC_TIM1_A>;
impl RTC_TIM1_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_TIM1_A {
match self.bits {
false => RTC_TIM1_A::VALUE1,
true => RTC_TIM1_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_TIM1_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_TIM1_A::VALUE2
}
}
#[doc = "Retention Memory Access Register Update Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RMX_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RMX_A> for bool {
#[inline(always)]
fn from(variant: RMX_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RMX` reader - Retention Memory Access Register Update Status"]
pub type RMX_R = crate::BitReader<RMX_A>;
impl RMX_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RMX_A {
match self.bits {
false => RMX_A::VALUE1,
true => RMX_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RMX_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RMX_A::VALUE2
}
}
#[doc = "RTC MSKSSR Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_MSKSR_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_MSKSR_A> for bool {
#[inline(always)]
fn from(variant: RTC_MSKSR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_MSKSR` reader - RTC MSKSSR Mirror Register Write Status"]
pub type RTC_MSKSR_R = crate::BitReader<RTC_MSKSR_A>;
impl RTC_MSKSR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_MSKSR_A {
match self.bits {
false => RTC_MSKSR_A::VALUE1,
true => RTC_MSKSR_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_MSKSR_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_MSKSR_A::VALUE2
}
}
#[doc = "RTC CLRSR Mirror Register Write Status\n\nValue on reset: 0"]
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum RTC_CLRSR_A {
#[doc = "0: Ready"]
VALUE1 = 0,
#[doc = "1: Busy"]
VALUE2 = 1,
}
impl From<RTC_CLRSR_A> for bool {
#[inline(always)]
fn from(variant: RTC_CLRSR_A) -> Self {
variant as u8 != 0
}
}
#[doc = "Field `RTC_CLRSR` reader - RTC CLRSR Mirror Register Write Status"]
pub type RTC_CLRSR_R = crate::BitReader<RTC_CLRSR_A>;
impl RTC_CLRSR_R {
#[doc = "Get enumerated values variant"]
#[inline(always)]
pub const fn variant(&self) -> RTC_CLRSR_A {
match self.bits {
false => RTC_CLRSR_A::VALUE1,
true => RTC_CLRSR_A::VALUE2,
}
}
#[doc = "Ready"]
#[inline(always)]
pub fn is_value1(&self) -> bool {
*self == RTC_CLRSR_A::VALUE1
}
#[doc = "Busy"]
#[inline(always)]
pub fn is_value2(&self) -> bool {
*self == RTC_CLRSR_A::VALUE2
}
}
impl R {
#[doc = "Bit 1 - HDCLR Mirror Register Write Status"]
#[inline(always)]
pub fn hdclr(&self) -> HDCLR_R {
HDCLR_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 2 - HDSET Mirror Register Write Status"]
#[inline(always)]
pub fn hdset(&self) -> HDSET_R {
HDSET_R::new(((self.bits >> 2) & 1) != 0)
}
#[doc = "Bit 3 - HDCR Mirror Register Write Status"]
#[inline(always)]
pub fn hdcr(&self) -> HDCR_R {
HDCR_R::new(((self.bits >> 3) & 1) != 0)
}
#[doc = "Bit 5 - OSCSICTRL Mirror Register Write Status"]
#[inline(always)]
pub fn oscsictrl(&self) -> OSCSICTRL_R {
OSCSICTRL_R::new(((self.bits >> 5) & 1) != 0)
}
#[doc = "Bit 7 - OSCULCTRL Mirror Register Write Status"]
#[inline(always)]
pub fn osculctrl(&self) -> OSCULCTRL_R {
OSCULCTRL_R::new(((self.bits >> 7) & 1) != 0)
}
#[doc = "Bit 8 - RTC CTR Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_ctr(&self) -> RTC_CTR_R {
RTC_CTR_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9 - RTC ATIM0 Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_atim0(&self) -> RTC_ATIM0_R {
RTC_ATIM0_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10 - RTC ATIM1 Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_atim1(&self) -> RTC_ATIM1_R {
RTC_ATIM1_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11 - RTC TIM0 Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_tim0(&self) -> RTC_TIM0_R {
RTC_TIM0_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 12 - RTC TIM1 Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_tim1(&self) -> RTC_TIM1_R {
RTC_TIM1_R::new(((self.bits >> 12) & 1) != 0)
}
#[doc = "Bit 13 - Retention Memory Access Register Update Status"]
#[inline(always)]
pub fn rmx(&self) -> RMX_R {
RMX_R::new(((self.bits >> 13) & 1) != 0)
}
#[doc = "Bit 14 - RTC MSKSSR Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_msksr(&self) -> RTC_MSKSR_R {
RTC_MSKSR_R::new(((self.bits >> 14) & 1) != 0)
}
#[doc = "Bit 15 - RTC CLRSR Mirror Register Write Status"]
#[inline(always)]
pub fn rtc_clrsr(&self) -> RTC_CLRSR_R {
RTC_CLRSR_R::new(((self.bits >> 15) & 1) != 0)
}
}
#[doc = "Mirror Write Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mirrsts::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct MIRRSTS_SPEC;
impl crate::RegisterSpec for MIRRSTS_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`mirrsts::R`](R) reader structure"]
impl crate::Readable for MIRRSTS_SPEC {}
#[doc = "`reset()` method sets MIRRSTS to value 0"]
impl crate::Resettable for MIRRSTS_SPEC {
const RESET_VALUE: u32 = 0;
}