Expand description
Baud Rate Generator Register
Structs§
- Baud Rate Generator Register
Enums§
- Clock Selection
- Input Selection for CTQ
- Master Clock Configuration
- Enable 2:1 Divider for fPPP
- Shift Clock Output Configuration
- Shift Clock Output Select
- Timing Measurement Enable
Type Aliases§
- Field
CLKSELreader - Clock Selection - Field
CLKSELwriter - Clock Selection - Field
CTQSELreader - Input Selection for CTQ - Field
CTQSELwriter - Input Selection for CTQ - Field
DCTQreader - Denominator for Time Quanta Counter - Field
DCTQwriter - Denominator for Time Quanta Counter - Field
MCLKCFGreader - Master Clock Configuration - Field
MCLKCFGwriter - Master Clock Configuration - Field
PCTQreader - Pre-Divider for Time Quanta Counter - Field
PCTQwriter - Pre-Divider for Time Quanta Counter - Field
PDIVreader - Divider Mode: Divider Factor to Generate fPDIV - Field
PDIVwriter - Divider Mode: Divider Factor to Generate fPDIV - Field
PPPENreader - Enable 2:1 Divider for fPPP - Field
PPPENwriter - Enable 2:1 Divider for fPPP - Register
BRGreader - Field
SCLKCFGreader - Shift Clock Output Configuration - Field
SCLKCFGwriter - Shift Clock Output Configuration - Field
SCLKOSELreader - Shift Clock Output Select - Field
SCLKOSELwriter - Shift Clock Output Select - Field
TMENreader - Timing Measurement Enable - Field
TMENwriter - Timing Measurement Enable - Register
BRGwriter