Module xmc4800::scu_clk::mlinkclkcr

Multi-Link Clock Control

Structs

• MlinkclkcrSpec
  Multi-Link Clock Control

Enums

• Ccudiv
  CCU Clock Divider Enable
• Cpudiv
  CPU Clock Divider Enable
• Pbdiv
  PB Clock Divider Enable
• Syssel
  System Clock Selection Value
• Wdtsel
  WDT Clock Selection Value

Type Aliases

• CcudivR
  Field CCUDIV reader - CCU Clock Divider Enable
• CcudivW
  Field CCUDIV writer - CCU Clock Divider Enable
• CpudivR
  Field CPUDIV reader - CPU Clock Divider Enable
• CpudivW
  Field CPUDIV writer - CPU Clock Divider Enable
• EbudivR
  Field EBUDIV reader - EBU Clock Divider Value
• EbudivW
  Field EBUDIV writer - EBU Clock Divider Value
• PbdivR
  Field PBDIV reader - PB Clock Divider Enable
• PbdivW
  Field PBDIV writer - PB Clock Divider Enable
• R
  Register MLINKCLKCR reader
• SysdivR
  Field SYSDIV reader - System Clock Division Value
• SysdivW
  Field SYSDIV writer - System Clock Division Value
• SysselR
  Field SYSSEL reader - System Clock Selection Value
• SysselW
  Field SYSSEL writer - System Clock Selection Value
• W
  Register MLINKCLKCR writer
• WdtdivR
  Field WDTDIV reader - WDT Clock Divider Value
• WdtdivW
  Field WDTDIV writer - WDT Clock Divider Value
• WdtselR
  Field WDTSEL reader - WDT Clock Selection Value
• WdtselW
  Field WDTSEL writer - WDT Clock Selection Value