Module xmc4500::port5::pdr0

Port 5 Pad Driver Mode 0 Register

Structs

• PDR0_SPEC
  Port 5 Pad Driver Mode 0 Register

Enums

• PD0_A
  Pad Driver Mode for Pn.0
• PD1_A
  Pad Driver Mode for Pn.1
• PD2_A
  Pad Driver Mode for Pn.2
• PD3_A
  Pad Driver Mode for Pn.3
• PD4_A
  Pad Driver Mode for Pn.4
• PD5_A
  Pad Driver Mode for Pn.5
• PD6_A
  Pad Driver Mode for Pn.6
• PD7_A
  Pad Driver Mode for Pn.7

Type Aliases

• PD0_R
  Field PD0 reader - Pad Driver Mode for Pn.0
• PD0_W
  Field PD0 writer - Pad Driver Mode for Pn.0
• PD1_R
  Field PD1 reader - Pad Driver Mode for Pn.1
• PD1_W
  Field PD1 writer - Pad Driver Mode for Pn.1
• PD2_R
  Field PD2 reader - Pad Driver Mode for Pn.2
• PD2_W
  Field PD2 writer - Pad Driver Mode for Pn.2
• PD3_R
  Field PD3 reader - Pad Driver Mode for Pn.3
• PD3_W
  Field PD3 writer - Pad Driver Mode for Pn.3
• PD4_R
  Field PD4 reader - Pad Driver Mode for Pn.4
• PD4_W
  Field PD4 writer - Pad Driver Mode for Pn.4
• PD5_R
  Field PD5 reader - Pad Driver Mode for Pn.5
• PD5_W
  Field PD5 writer - Pad Driver Mode for Pn.5
• PD6_R
  Field PD6 reader - Pad Driver Mode for Pn.6
• PD6_W
  Field PD6 writer - Pad Driver Mode for Pn.6
• PD7_R
  Field PD7 reader - Pad Driver Mode for Pn.7
• PD7_W
  Field PD7 writer - Pad Driver Mode for Pn.7
• R
  Register PDR0 reader
• W
  Register PDR0 writer