Module xmc4300::usic0_ch0

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Expand description

Universal Serial Interface Controller 0

Modules§

  • Baud Rate Generator Register
  • Bypass Data Register
  • Bypass Control Register
  • Channel Configuration Register
  • Channel Control Register
  • Capture Mode Timer Register
  • Input Control Register 0
  • Input Control Register 1
  • Input Control Register 2
  • Input Control Register 3
  • Input Control Register 4
  • Input Control Register 5
  • Fractional Divider Register
  • Flag Modification Register
  • Transmit FIFO Buffer
  • Interrupt Node Pointer Register
  • Kernel State Configuration Register
  • Receiver Buffer Output Register L for Debugger
  • Receiver Buffer Output Register
  • Protocol Control Register
  • Protocol Control Register [ASC Mode]
  • Protocol Control Register [IIC Mode]
  • Protocol Control Register [IIS Mode]
  • Protocol Control Register [SSC Mode]
  • Protocol Status Clear Register
  • Protocol Status Register
  • Protocol Status Register [ASC Mode]
  • Protocol Status Register [IIC Mode]
  • Protocol Status Register [IIS Mode]
  • Protocol Status Register [SSC Mode]
  • Receiver Buffer Control Register
  • Receiver Buffer Register
  • Receiver Buffer Register 0
  • Receiver Buffer 01 Status Register
  • Receiver Buffer Register 1
  • Receiver Buffer Register for Debugger
  • Receiver Buffer Status Register
  • Shift Control Register
  • Transmitter Buffer Control Register
  • Transmit Buffer
  • Transmit Control/Status Register
  • Transmit/Receive Buffer Pointer Register
  • Transmit/Receive Buffer Status Clear Register
  • Transmit/Receive Buffer Status Register

Structs§

Type Aliases§

  • BRG (rw) register accessor: Baud Rate Generator Register
  • BYP (rw) register accessor: Bypass Data Register
  • BYPCR (rw) register accessor: Bypass Control Register
  • CCFG (r) register accessor: Channel Configuration Register
  • CCR (rw) register accessor: Channel Control Register
  • CMTR (rw) register accessor: Capture Mode Timer Register
  • DX0CR (rw) register accessor: Input Control Register 0
  • DX1CR (rw) register accessor: Input Control Register 1
  • DX2CR (rw) register accessor: Input Control Register 2
  • DX3CR (rw) register accessor: Input Control Register 3
  • DX4CR (rw) register accessor: Input Control Register 4
  • DX5CR (rw) register accessor: Input Control Register 5
  • FDR (rw) register accessor: Fractional Divider Register
  • FMR (w) register accessor: Flag Modification Register
  • IN (w) register accessor: Transmit FIFO Buffer
  • INPR (rw) register accessor: Interrupt Node Pointer Register
  • KSCFG (rw) register accessor: Kernel State Configuration Register
  • OUTDR (r) register accessor: Receiver Buffer Output Register L for Debugger
  • OUTR (r) register accessor: Receiver Buffer Output Register
  • PCR (rw) register accessor: Protocol Control Register
  • PCR_ASCMode (rw) register accessor: Protocol Control Register [ASC Mode]
  • PCR_IICMode (rw) register accessor: Protocol Control Register [IIC Mode]
  • PCR_IISMode (rw) register accessor: Protocol Control Register [IIS Mode]
  • PCR_SSCMode (rw) register accessor: Protocol Control Register [SSC Mode]
  • PSCR (w) register accessor: Protocol Status Clear Register
  • PSR (rw) register accessor: Protocol Status Register
  • PSR_ASCMode (rw) register accessor: Protocol Status Register [ASC Mode]
  • PSR_IICMode (rw) register accessor: Protocol Status Register [IIC Mode]
  • PSR_IISMode (rw) register accessor: Protocol Status Register [IIS Mode]
  • PSR_SSCMode (rw) register accessor: Protocol Status Register [SSC Mode]
  • RBCTR (rw) register accessor: Receiver Buffer Control Register
  • RBUF (r) register accessor: Receiver Buffer Register
  • RBUF0 (r) register accessor: Receiver Buffer Register 0
  • RBUF01SR (r) register accessor: Receiver Buffer 01 Status Register
  • RBUF1 (r) register accessor: Receiver Buffer Register 1
  • RBUFD (r) register accessor: Receiver Buffer Register for Debugger
  • RBUFSR (r) register accessor: Receiver Buffer Status Register
  • SCTR (rw) register accessor: Shift Control Register
  • TBCTR (rw) register accessor: Transmitter Buffer Control Register
  • TBUF (rw) register accessor: Transmit Buffer
  • TCSR (rw) register accessor: Transmit Control/Status Register
  • TRBPTR (r) register accessor: Transmit/Receive Buffer Pointer Register
  • TRBSCR (w) register accessor: Transmit/Receive Buffer Status Clear Register
  • TRBSR (rw) register accessor: Transmit/Receive Buffer Status Register