Crate xmc4200[][src]

Expand description

Peripheral access API for XMC4200 microcontrollers (generated using svd2rust v0.19.0 ( ))

You can find an overview of the generated API here.

API features to be included in the next svd2rust release can be generated by cloning the svd2rust repository, checking out the above commit, and running cargo doc --open.

Re-exports

pub use self::Interrupt as interrupt;

Modules

Controller Area Networks

Controller Area Networks

Controller Area Networks

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 8 - Unit 0

Capture Compare Unit 8 - Unit 0

Digital to Analog Converter

DMA Line Router

Event Request Unit 0

Flexible CRC Engine

Flexible CRC Engine

Flash Memory Controller

Common register and bit access and modify traits

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

LED and Touch Sense Unit 0

Peripheral Bridge AHB 0

Program Management Unit

Port 0

Port 1

Port 2

Port 3

Port 14

Position Interface 0

Cortex-M4 Private Peripheral Block

Prefetch Unit

Real Time Clock

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Interface Controller 0

Universal Serial Interface Controller 0

Analog to Digital Converter

Analog to Digital Converter

Watch Dog Timer

Structs

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Controller Area Networks

Cache and branch predictor maintenance operations

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 0

Capture Compare Unit 4 - Unit 1

Capture Compare Unit 4 - Unit 1

Capture Compare Unit 4 - Unit 1

Capture Compare Unit 4 - Unit 1

Capture Compare Unit 4 - Unit 1

Capture Compare Unit 8 - Unit 0

Capture Compare Unit 8 - Unit 0

Capture Compare Unit 8 - Unit 0

Capture Compare Unit 8 - Unit 0

Capture Compare Unit 8 - Unit 0

CPUID

Core peripherals

Digital to Analog Converter

Debug Control Block

DMA Line Router

Data Watchpoint and Trace unit

Event Request Unit 0

Event Request Unit 1

Flexible CRC Engine

Flexible CRC Engine

Flexible CRC Engine

Flexible CRC Engine

Flexible CRC Engine

Flash Memory Controller

Flash Patch and Breakpoint unit

Floating Point Unit

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

General Purpose DMA Unit 0

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

High Resolution PWM Unit

Instrumentation Trace Macrocell

LED and Touch Sense Unit 0

Memory Protection Unit

Nested Vector Interrupt Controller

Peripheral Bridge AHB 0

Peripheral Bridge AHB 1

Program Management Unit

Port 0

Port 1

Port 2

Port 3

Port 14

Position Interface 0

Cortex-M4 Private Peripheral Block

Prefetch Unit

All the peripherals

Real Time Clock

System Control Block

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

System Control Unit

SysTick: System Timer

Trace Port Interface Unit

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Bus

Universal Serial Interface Controller 0

Universal Serial Interface Controller 0

Universal Serial Interface Controller 0

Universal Serial Interface Controller 1

Universal Serial Interface Controller 1

Universal Serial Interface Controller 1

Analog to Digital Converter

Analog to Digital Converter

Analog to Digital Converter

Watch Dog Timer

Enums

Enumeration of all the interrupts.

Constants

Number available in the NVIC for configuring priority

Attribute Macros