Module xmc4200::usic0_ch0::pcr_iismode

Protocol Control Register [IIS Mode]

Structs

• PcrIismodeSpec
  Protocol Control Register [IIS Mode]

Enums

• Dten
  Data Transfers Enable
• Dx2tien
  DX2T Interrupt Enable
• Endien
  END Interrupt Enable
• Mclk
  Master Clock Enable
• Selinv
  Select Inversion
• Wafeien
  WA Falling Edge Interrupt Enable
• Wagen
  WA Generation Enable
• Wareien
  WA Rising Edge Interrupt Enable

Type Aliases

• DtenR
  Field DTEN reader - Data Transfers Enable
• DtenW
  Field DTEN writer - Data Transfers Enable
• Dx2tienR
  Field DX2TIEN reader - DX2T Interrupt Enable
• Dx2tienW
  Field DX2TIEN writer - DX2T Interrupt Enable
• EndienR
  Field ENDIEN reader - END Interrupt Enable
• EndienW
  Field ENDIEN writer - END Interrupt Enable
• MclkR
  Field MCLK reader - Master Clock Enable
• MclkW
  Field MCLK writer - Master Clock Enable
• R
  Register PCR_IISMode reader
• SelinvR
  Field SELINV reader - Select Inversion
• SelinvW
  Field SELINV writer - Select Inversion
• TdelR
  Field TDEL reader - Transfer Delay
• TdelW
  Field TDEL writer - Transfer Delay
• W
  Register PCR_IISMode writer
• WafeienR
  Field WAFEIEN reader - WA Falling Edge Interrupt Enable
• WafeienW
  Field WAFEIEN writer - WA Falling Edge Interrupt Enable
• WagenR
  Field WAGEN reader - WA Generation Enable
• WagenW
  Field WAGEN writer - WA Generation Enable
• WareienR
  Field WAREIEN reader - WA Rising Edge Interrupt Enable
• WareienW
  Field WAREIEN writer - WA Rising Edge Interrupt Enable