Module xmc4100::usic0_ch0

source ·
Expand description

Universal Serial Interface Controller 0

Modules

Baud Rate Generator Register
Bypass Data Register
Bypass Control Register
Channel Configuration Register
Channel Control Register
Capture Mode Timer Register
Input Control Register 0
Input Control Register 1
Input Control Register 2
Input Control Register 3
Input Control Register 4
Input Control Register 5
Fractional Divider Register
Flag Modification Register
Transmit FIFO Buffer
Interrupt Node Pointer Register
Kernel State Configuration Register
Receiver Buffer Output Register L for Debugger
Receiver Buffer Output Register
Protocol Control Register
Protocol Control Register [ASC Mode]
Protocol Control Register [IIC Mode]
Protocol Control Register [IIS Mode]
Protocol Control Register [SSC Mode]
Protocol Status Clear Register
Protocol Status Register
Protocol Status Register [ASC Mode]
Protocol Status Register [IIC Mode]
Protocol Status Register [IIS Mode]
Protocol Status Register [SSC Mode]
Receiver Buffer Control Register
Receiver Buffer Register
Receiver Buffer Register 0
Receiver Buffer 01 Status Register
Receiver Buffer Register 1
Receiver Buffer Register for Debugger
Receiver Buffer Status Register
Shift Control Register
Transmitter Buffer Control Register
Transmit Buffer
Transmit Control/Status Register
Transmit/Receive Buffer Pointer Register
Transmit/Receive Buffer Status Clear Register
Transmit/Receive Buffer Status Register

Structs

Baud Rate Generator Register
Bypass Data Register
Bypass Control Register
Channel Configuration Register
Channel Control Register
Capture Mode Timer Register
Input Control Register 0
Input Control Register 1
Input Control Register 2
Input Control Register 3
Input Control Register 4
Input Control Register 5
Fractional Divider Register
Flag Modification Register
Transmit FIFO Buffer
Interrupt Node Pointer Register
Kernel State Configuration Register
Receiver Buffer Output Register L for Debugger
Receiver Buffer Output Register
Protocol Control Register
Protocol Control Register [ASC Mode]
Protocol Control Register [IIC Mode]
Protocol Control Register [IIS Mode]
Protocol Control Register [SSC Mode]
Protocol Status Clear Register
Protocol Status Register
Protocol Status Register [ASC Mode]
Protocol Status Register [IIC Mode]
Protocol Status Register [IIS Mode]
Protocol Status Register [SSC Mode]
Receiver Buffer Control Register
Receiver Buffer Register
Receiver Buffer Register 0
Receiver Buffer 01 Status Register
Receiver Buffer Register 1
Receiver Buffer Register for Debugger
Receiver Buffer Status Register
Register block
Shift Control Register
Transmitter Buffer Control Register
Transmit Buffer
Transmit Control/Status Register
Transmit/Receive Buffer Pointer Register
Transmit/Receive Buffer Status Clear Register
Transmit/Receive Buffer Status Register