Expand description

Functions to read and write debug registers.

  • The dr{0,1,2,3} registers are used to set break points.
  • The dr6 register contains debug conditions that were sampled at the time the last debug exception.
  • The dr7 register enables or disables breakpoints and sets breakpoint conditions.

See Intel Vol. 3a Chapter 17, “Debug, Branch, Profile, TSC … Features”

Potential API Improvements

Maybe Breakpoint should be a linear type, and functions that mutate dr0-dr3 should take &mut self. That would mean we’d have to remove BREAKPOINT_REGS and a client maintains some mutable instance to the registers on every core on its own.

Structs

Debug register 6 (dr6) flags.

Enums

Specifies the breakpoint condition for a corresponding breakpoint.
Specify the size of the memory location at the address specified in the corresponding breakpoint address register (DR0 through DR3).
Specifies available hardware breakpoints.

Constants

An array list of all available breakpoint registers.

Functions

dr0
Read dr0.
Write dr0.
dr1
Read dr1.
Write dr1.
dr2
Read dr2.
Write dr2.
dr3
Read dr3.
Write dr3.
dr6
Read dr6.
Write dr6.
dr7
Read dr7.
Write dr7.