Constant x86::msr::MSR_IFSB_SNPQ0

pub const MSR_IFSB_SNPQ0: u32 = 0x107ce;

IFSB SNPQ Event Control and Counter Register (R/W) See Section 18.17, Performance Monitoring on 64-bit Intel Xeon Processor MP with Up to 8-MByte L3 Cache.