[][src]Module wip_s32k144::mscm::cp0cfg3

Processor 0 Configuration Register 3

Enums

BB_A

Bit Banding

CMP_A

Core Memory Protection unit

FPU_A

Floating Point Unit

JAZ_A

Jazelle support

MMU_A

Memory Management Unit

SIMD_A

SIMD/NEON instruction support

TZ_A

Trust Zone

Type Definitions

BB_R

Reader of field BB

CMP_R

Reader of field CMP

FPU_R

Reader of field FPU

JAZ_R

Reader of field JAZ

MMU_R

Reader of field MMU

R

Reader of register CP0CFG3

SBP_R

Reader of field SBP

SIMD_R

Reader of field SIMD

TZ_R

Reader of field TZ