Expand description
Platform agnostic rust driver for the Wiznet W5500 SPI internet offload chip.
This is a low-level (ll) crate. The scope of this crate is:
- Register accessors.
- Networking data types.
Higher level functionality (such as socket operations) should be built on-top of what is provided here.
§Example
Reading the VERSIONR register (a constant value).
use w5500_ll::{eh1::vdm::W5500, Registers};
let mut w5500 = W5500::new(spi);
let version: u8 = w5500.version()?;
assert_eq!(version, 0x04);
§Feature Flags
All features are disabled by default.
defmt
: Enable formatting most types withdefmt
.eh0
: Enables theeh0
module which contains implementations of theRegisters
trait using theembedded-hal
version 0.2 traits.eh1
: Enables theeh1
module which contains implementations of theRegisters
trait using theembedded-hal
version 1 traits.eha1
: Implements theaio::Registers
trait for types in theeh1
module using theembedded-hal-async
traits.
Modules§
- Asynchronous W5500 traits.
- eh0
eh0
Blocking implementations of theRegisters
trait using theembedded-hal
version 0.2 blocking SPI traits. - eh1
eh1
Blocking implementations of theRegisters
trait using theembedded-hal
version 1 blocking SPI traits. - Networking data types.
- Helpers and functions relating to W5500 SPI transfers.
Structs§
- Interrupt and interrupt mask register (IR and IMR).
- Mode register (MR).
- PHY configuration register (PHYCFGR).
- RX socket buffer pointers.
- Socket Interrupt Register (Sn_IR).
- Socket Interrupt Mask Register (Sn_IMR).
- Socket Mode Register (Sn_MR).
- TX socket buffer pointers.
Enums§
- RX and TX buffer sizes.
- PHY duplex status.
- PHY link status.
- PHY operation mode.
- Socket protocol.
- W5500 common register addresses.
- W5500 socket numbers.
- W5500 socket register addresses.
- Socket commands.
- Socket status.
- PHY speed status.
Constants§
- Common register block address offset.
- Array of all sockets.
- Value of the W5500 VERSIONR register.
Traits§
- W5500 register setters and getters.