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Crate vs1003_pac

Crate vs1003_pac 

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The low-level peripheral access definitions for VS1003 codec. Some of those definition may also work for other chips in the family, however there are some incompatible changes between them.

Each method checks the DREQ pin and if it is low it will return Vs1003InterfaceError::Busy if so. Please note though, that the device may not lower this pin immediately after a successful transfer. This time doesn’t seem well-specified, however on the forums they seem to recommend a 1us delay after completion of a command and before checking the DREQ pin.

Modules§

field_sets
Module containing the generated fieldsets of the registers and commands

Structs§

Vs1003
Root block of the Vs1003 driver
Vs1003Interface
The necessary interfaces to communicate with a VS1003 chip.

Enums§

AdpcmInput
The recording input
DclkEdge
Active edge for SDI interface
SdiBitOrder
The bit order for the SDI interface
Version
The connected device
Vs1003InterfaceError
The error type that can be returned by various interface APIs