[][src]Trait trellis_m4::sercom::RxpoTxpo

pub trait RxpoTxpo {
    pub fn rxpo_txpo(&self) -> (u8, u8);
}

The RxpoTxpo trait defines a way to get the data in and data out pin out values for a given UARTXPadout configuration. You should not implement this trait for yourself; only the implementations in the sercom module make sense.

Required methods

pub fn rxpo_txpo(&self) -> (u8, u8)[src]

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Implementors

impl<PIN0, PIN1> RxpoTxpo for UART0Padout<Pad<Sercom0, Pad1, PIN0>, Pad<Sercom0, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom0, Pad1>,
    PIN1: Map<Sercom0, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART0Padout<Pad<Sercom0, Pad2, PIN0>, Pad<Sercom0, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom0, Pad2>,
    PIN1: Map<Sercom0, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART0Padout<Pad<Sercom0, Pad3, PIN0>, Pad<Sercom0, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom0, Pad3>,
    PIN1: Map<Sercom0, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART1Padout<Pad<Sercom1, Pad1, PIN0>, Pad<Sercom1, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom1, Pad1>,
    PIN1: Map<Sercom1, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART1Padout<Pad<Sercom1, Pad2, PIN0>, Pad<Sercom1, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom1, Pad2>,
    PIN1: Map<Sercom1, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART1Padout<Pad<Sercom1, Pad3, PIN0>, Pad<Sercom1, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom1, Pad3>,
    PIN1: Map<Sercom1, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART2Padout<Pad<Sercom2, Pad1, PIN0>, Pad<Sercom2, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom2, Pad1>,
    PIN1: Map<Sercom2, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART2Padout<Pad<Sercom2, Pad2, PIN0>, Pad<Sercom2, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom2, Pad2>,
    PIN1: Map<Sercom2, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART2Padout<Pad<Sercom2, Pad3, PIN0>, Pad<Sercom2, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom2, Pad3>,
    PIN1: Map<Sercom2, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART3Padout<Pad<Sercom3, Pad1, PIN0>, Pad<Sercom3, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom3, Pad1>,
    PIN1: Map<Sercom3, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART3Padout<Pad<Sercom3, Pad2, PIN0>, Pad<Sercom3, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom3, Pad2>,
    PIN1: Map<Sercom3, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART3Padout<Pad<Sercom3, Pad3, PIN0>, Pad<Sercom3, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom3, Pad3>,
    PIN1: Map<Sercom3, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART4Padout<Pad<Sercom4, Pad1, PIN0>, Pad<Sercom4, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom4, Pad1>,
    PIN1: Map<Sercom4, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART4Padout<Pad<Sercom4, Pad2, PIN0>, Pad<Sercom4, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom4, Pad2>,
    PIN1: Map<Sercom4, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART4Padout<Pad<Sercom4, Pad3, PIN0>, Pad<Sercom4, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom4, Pad3>,
    PIN1: Map<Sercom4, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART5Padout<Pad<Sercom5, Pad1, PIN0>, Pad<Sercom5, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom5, Pad1>,
    PIN1: Map<Sercom5, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART5Padout<Pad<Sercom5, Pad2, PIN0>, Pad<Sercom5, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom5, Pad2>,
    PIN1: Map<Sercom5, Pad0>, 
[src]

impl<PIN0, PIN1> RxpoTxpo for UART5Padout<Pad<Sercom5, Pad3, PIN0>, Pad<Sercom5, Pad0, PIN1>, (), ()> where
    PIN0: Map<Sercom5, Pad3>,
    PIN1: Map<Sercom5, Pad0>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART0Padout<Pad<Sercom0, Pad1, PIN0>, Pad<Sercom0, Pad0, PIN1>, Pad<Sercom0, Pad2, PIN2>, Pad<Sercom0, Pad3, PIN3>> where
    PIN0: Map<Sercom0, Pad1>,
    PIN1: Map<Sercom0, Pad0>,
    PIN2: Map<Sercom0, Pad2>,
    PIN3: Map<Sercom0, Pad3>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART1Padout<Pad<Sercom1, Pad1, PIN0>, Pad<Sercom1, Pad0, PIN1>, Pad<Sercom1, Pad2, PIN2>, Pad<Sercom1, Pad3, PIN3>> where
    PIN0: Map<Sercom1, Pad1>,
    PIN1: Map<Sercom1, Pad0>,
    PIN2: Map<Sercom1, Pad2>,
    PIN3: Map<Sercom1, Pad3>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART2Padout<Pad<Sercom2, Pad1, PIN0>, Pad<Sercom2, Pad0, PIN1>, Pad<Sercom2, Pad2, PIN2>, Pad<Sercom2, Pad3, PIN3>> where
    PIN0: Map<Sercom2, Pad1>,
    PIN1: Map<Sercom2, Pad0>,
    PIN2: Map<Sercom2, Pad2>,
    PIN3: Map<Sercom2, Pad3>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART3Padout<Pad<Sercom3, Pad1, PIN0>, Pad<Sercom3, Pad0, PIN1>, Pad<Sercom3, Pad2, PIN2>, Pad<Sercom3, Pad3, PIN3>> where
    PIN0: Map<Sercom3, Pad1>,
    PIN1: Map<Sercom3, Pad0>,
    PIN2: Map<Sercom3, Pad2>,
    PIN3: Map<Sercom3, Pad3>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART4Padout<Pad<Sercom4, Pad1, PIN0>, Pad<Sercom4, Pad0, PIN1>, Pad<Sercom4, Pad2, PIN2>, Pad<Sercom4, Pad3, PIN3>> where
    PIN0: Map<Sercom4, Pad1>,
    PIN1: Map<Sercom4, Pad0>,
    PIN2: Map<Sercom4, Pad2>,
    PIN3: Map<Sercom4, Pad3>, 
[src]

impl<PIN0, PIN1, PIN2, PIN3> RxpoTxpo for UART5Padout<Pad<Sercom5, Pad1, PIN0>, Pad<Sercom5, Pad0, PIN1>, Pad<Sercom5, Pad2, PIN2>, Pad<Sercom5, Pad3, PIN3>> where
    PIN0: Map<Sercom5, Pad1>,
    PIN1: Map<Sercom5, Pad0>,
    PIN2: Map<Sercom5, Pad2>,
    PIN3: Map<Sercom5, Pad3>, 
[src]

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