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#[doc = "Reader of register RCGCGPIO"] pub type R = crate::R<u32, super::RCGCGPIO>; #[doc = "Writer for register RCGCGPIO"] pub type W = crate::W<u32, super::RCGCGPIO>; #[doc = "Register RCGCGPIO `reset()`'s with value 0"] impl crate::ResetValue for super::RCGCGPIO { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `R0`"] pub type R0_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R0`"] pub struct R0_W<'a> { w: &'a mut W, } impl<'a> R0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `R1`"] pub type R1_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R1`"] pub struct R1_W<'a> { w: &'a mut W, } impl<'a> R1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `R2`"] pub type R2_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R2`"] pub struct R2_W<'a> { w: &'a mut W, } impl<'a> R2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `R3`"] pub type R3_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R3`"] pub struct R3_W<'a> { w: &'a mut W, } impl<'a> R3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `R4`"] pub type R4_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R4`"] pub struct R4_W<'a> { w: &'a mut W, } impl<'a> R4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `R5`"] pub type R5_R = crate::R<bool, bool>; #[doc = "Write proxy for field `R5`"] pub struct R5_W<'a> { w: &'a mut W, } impl<'a> R5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } impl R { #[doc = "Bit 0 - GPIO Port A Run Mode Clock Gating Control"] #[inline(always)] pub fn r0(&self) -> R0_R { R0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - GPIO Port B Run Mode Clock Gating Control"] #[inline(always)] pub fn r1(&self) -> R1_R { R1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - GPIO Port C Run Mode Clock Gating Control"] #[inline(always)] pub fn r2(&self) -> R2_R { R2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - GPIO Port D Run Mode Clock Gating Control"] #[inline(always)] pub fn r3(&self) -> R3_R { R3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - GPIO Port E Run Mode Clock Gating Control"] #[inline(always)] pub fn r4(&self) -> R4_R { R4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - GPIO Port F Run Mode Clock Gating Control"] #[inline(always)] pub fn r5(&self) -> R5_R { R5_R::new(((self.bits >> 5) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - GPIO Port A Run Mode Clock Gating Control"] #[inline(always)] pub fn r0(&mut self) -> R0_W { R0_W { w: self } } #[doc = "Bit 1 - GPIO Port B Run Mode Clock Gating Control"] #[inline(always)] pub fn r1(&mut self) -> R1_W { R1_W { w: self } } #[doc = "Bit 2 - GPIO Port C Run Mode Clock Gating Control"] #[inline(always)] pub fn r2(&mut self) -> R2_W { R2_W { w: self } } #[doc = "Bit 3 - GPIO Port D Run Mode Clock Gating Control"] #[inline(always)] pub fn r3(&mut self) -> R3_W { R3_W { w: self } } #[doc = "Bit 4 - GPIO Port E Run Mode Clock Gating Control"] #[inline(always)] pub fn r4(&mut self) -> R4_W { R4_W { w: self } } #[doc = "Bit 5 - GPIO Port F Run Mode Clock Gating Control"] #[inline(always)] pub fn r5(&mut self) -> R5_W { R5_W { w: self } } }