pub enum Mode {
Target = 0,
Controller = 1,
}Expand description
Whether the TLV230AIC23B generates or receives clock signals.
Variants§
Target = 0
TLV230AIC23B receives the BCLK and LRCLK signals. The documentation uses an archaic term beginning with S.
Controller = 1
TLV230AIC23B generates the BCLK and LRCLK signals. The documentation uses the archaic term beginning with M.
Trait Implementations§
impl Copy for Mode
impl Eq for Mode
impl StructuralPartialEq for Mode
Auto Trait Implementations§
impl Freeze for Mode
impl RefUnwindSafe for Mode
impl Send for Mode
impl Sync for Mode
impl Unpin for Mode
impl UnwindSafe for Mode
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more