Module stm32wl::stm32wle5::rcc::pllcfgr

PLL configuration register

Re-exports

pub use PLLPEN_A as PLLREN_A;

pub use PLLPEN_R as PLLREN_R;

pub use PLLPEN_W as PLLREN_W;

pub use PLLQ_A as PLLR_A;

pub use PLLQ_R as PLLR_R;

pub use PLLQ_W as PLLR_W;

pub use PLLPEN_A as PLLQEN_A;

pub use PLLPEN_R as PLLQEN_R;

pub use PLLPEN_W as PLLQEN_W;

Structs

PLLCFGR_SPEC

PLL configuration register

R

Register PLLCFGR reader

W

Register PLLCFGR writer

Enums

PLLM_A

Division factor for the main PLL input clock

PLLPEN_A

Main PLL PLLPCLK output enable

PLLP_A

Main PLL division factor for PLLPCLK.

PLLQ_A

Main PLL division factor for PLLQCLK

PLLSRC_A

Main PLL entry clock source

Type Definitions

PLLM_R

Field PLLM reader - Division factor for the main PLL input clock

PLLM_W

Field PLLM writer - Division factor for the main PLL input clock

PLLN_R

Field PLLN reader - Main PLL multiplication factor for VCO

PLLN_W

Field PLLN writer - Main PLL multiplication factor for VCO

PLLPEN_R

Field PLLPEN reader - Main PLL PLLPCLK output enable

PLLPEN_W

Field PLLPEN writer - Main PLL PLLPCLK output enable

PLLP_R

Field PLLP reader - Main PLL division factor for PLLPCLK.

PLLP_W

Field PLLP writer - Main PLL division factor for PLLPCLK.

PLLQ_R

Field PLLQ reader - Main PLL division factor for PLLQCLK

PLLQ_W

Field PLLQ writer - Main PLL division factor for PLLQCLK

PLLSRC_R

Field PLLSRC reader - Main PLL entry clock source

PLLSRC_W

Field PLLSRC writer - Main PLL entry clock source