Module stm32wl::stm32wl5x_cm4::syscfg::cfgr2

source · [−]
Expand description

CFGR2

Structs

CFGR2_SPEC

CFGR2

R

Register CFGR2 reader

W

Register CFGR2 writer

Enums

CLL_A

CPU1 LOCKUP (Hardfault) output enable bit

CLL_AW

CPU1 LOCKUP (Hardfault) output enable bit

ECCL_A

ECC Lock

ECCL_AW

ECC Lock

PVDL_A

PVD lock enable bit

PVDL_AW

PVD lock enable bit

SPF_A

SRAM2 parity error flag

SPF_AW

SRAM2 parity error flag

SPL_A

SRAM2 parity lock bit

SPL_AW

SRAM2 parity lock bit

Type Definitions

CLL_R

Field CLL reader - CPU1 LOCKUP (Hardfault) output enable bit

CLL_W

Field CLL writer - CPU1 LOCKUP (Hardfault) output enable bit

ECCL_R

Field ECCL reader - ECC Lock

ECCL_W

Field ECCL writer - ECC Lock

PVDL_R

Field PVDL reader - PVD lock enable bit

PVDL_W

Field PVDL writer - PVD lock enable bit

SPF_R

Field SPF reader - SRAM2 parity error flag

SPF_W

Field SPF writer - SRAM2 parity error flag

SPL_R

Field SPL reader - SRAM2 parity lock bit

SPL_W

Field SPL writer - SRAM2 parity lock bit