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#[doc = "Register `C2APB2SMENR` reader"]
pub struct R(crate::R<C2APB2SMENR_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<C2APB2SMENR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<C2APB2SMENR_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<C2APB2SMENR_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `C2APB2SMENR` writer"]
pub struct W(crate::W<C2APB2SMENR_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<C2APB2SMENR_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<C2APB2SMENR_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<C2APB2SMENR_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `TIM17SMEN` reader - TIM17 timer clock enable during CPU2 CSleep mode"]
pub type TIM17SMEN_R = crate::BitReader<bool>;
#[doc = "Field `TIM17SMEN` writer - TIM17 timer clock enable during CPU2 CSleep mode"]
pub type TIM17SMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
#[doc = "Field `TIM16SMEN` reader - TIM16 timer clock enable during CPU2 CSleep mode"]
pub type TIM16SMEN_R = crate::BitReader<bool>;
#[doc = "Field `TIM16SMEN` writer - TIM16 timer clock enable during CPU2 CSleep mode"]
pub type TIM16SMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
#[doc = "Field `USART1SMEN` reader - USART1clock enable during CPU2 CSleep and CStop mode"]
pub type USART1SMEN_R = crate::BitReader<bool>;
#[doc = "Field `USART1SMEN` writer - USART1clock enable during CPU2 CSleep and CStop mode"]
pub type USART1SMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
#[doc = "Field `SPI1SMEN` reader - SPI1 clock enable during CPU2 CSleep mode"]
pub type SPI1SMEN_R = crate::BitReader<bool>;
#[doc = "Field `SPI1SMEN` writer - SPI1 clock enable during CPU2 CSleep mode"]
pub type SPI1SMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
#[doc = "Field `TIM1SMEN` reader - TIM1 timer clock enable during CPU2 CSleep mode"]
pub type TIM1SMEN_R = crate::BitReader<bool>;
#[doc = "Field `TIM1SMEN` writer - TIM1 timer clock enable during CPU2 CSleep mode"]
pub type TIM1SMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
#[doc = "Field `ADCSMEN` reader - ADC clocks enable during CPU2 Csleep and CStop modes"]
pub type ADCSMEN_R = crate::BitReader<bool>;
#[doc = "Field `ADCSMEN` writer - ADC clocks enable during CPU2 Csleep and CStop modes"]
pub type ADCSMEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, C2APB2SMENR_SPEC, bool, O>;
impl R {
    #[doc = "Bit 18 - TIM17 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim17smen(&self) -> TIM17SMEN_R {
        TIM17SMEN_R::new(((self.bits >> 18) & 1) != 0)
    }
    #[doc = "Bit 17 - TIM16 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim16smen(&self) -> TIM16SMEN_R {
        TIM16SMEN_R::new(((self.bits >> 17) & 1) != 0)
    }
    #[doc = "Bit 14 - USART1clock enable during CPU2 CSleep and CStop mode"]
    #[inline(always)]
    pub fn usart1smen(&self) -> USART1SMEN_R {
        USART1SMEN_R::new(((self.bits >> 14) & 1) != 0)
    }
    #[doc = "Bit 12 - SPI1 clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn spi1smen(&self) -> SPI1SMEN_R {
        SPI1SMEN_R::new(((self.bits >> 12) & 1) != 0)
    }
    #[doc = "Bit 11 - TIM1 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim1smen(&self) -> TIM1SMEN_R {
        TIM1SMEN_R::new(((self.bits >> 11) & 1) != 0)
    }
    #[doc = "Bit 9 - ADC clocks enable during CPU2 Csleep and CStop modes"]
    #[inline(always)]
    pub fn adcsmen(&self) -> ADCSMEN_R {
        ADCSMEN_R::new(((self.bits >> 9) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 18 - TIM17 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim17smen(&mut self) -> TIM17SMEN_W<18> {
        TIM17SMEN_W::new(self)
    }
    #[doc = "Bit 17 - TIM16 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim16smen(&mut self) -> TIM16SMEN_W<17> {
        TIM16SMEN_W::new(self)
    }
    #[doc = "Bit 14 - USART1clock enable during CPU2 CSleep and CStop mode"]
    #[inline(always)]
    pub fn usart1smen(&mut self) -> USART1SMEN_W<14> {
        USART1SMEN_W::new(self)
    }
    #[doc = "Bit 12 - SPI1 clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn spi1smen(&mut self) -> SPI1SMEN_W<12> {
        SPI1SMEN_W::new(self)
    }
    #[doc = "Bit 11 - TIM1 timer clock enable during CPU2 CSleep mode"]
    #[inline(always)]
    pub fn tim1smen(&mut self) -> TIM1SMEN_W<11> {
        TIM1SMEN_W::new(self)
    }
    #[doc = "Bit 9 - ADC clocks enable during CPU2 Csleep and CStop modes"]
    #[inline(always)]
    pub fn adcsmen(&mut self) -> ADCSMEN_W<9> {
        ADCSMEN_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "CPU2 APB2 peripheral clocks enable in Sleep mode register \\[dual core device only\\]\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2apb2smenr](index.html) module"]
pub struct C2APB2SMENR_SPEC;
impl crate::RegisterSpec for C2APB2SMENR_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [c2apb2smenr::R](R) reader structure"]
impl crate::Readable for C2APB2SMENR_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [c2apb2smenr::W](W) writer structure"]
impl crate::Writable for C2APB2SMENR_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets C2APB2SMENR to value 0x0006_5a00"]
impl crate::Resettable for C2APB2SMENR_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0x0006_5a00
    }
}