Module stm32wl::stm32wle5::dbgmcu[][src]

Microcontroller Debug Unit

Modules

apb1fzr1

DBGMCU CPU1 APB1 Peripheral Freeze Register 1

apb1fzr2

DBGMCU CPU1 APB1 Peripheral Freeze Register 2

apb2fzr

DBGMCU CPU1 APB2 Peripheral Freeze Register

c2apb1fzr1

DBGMCU CPU2 APB1 Peripheral Freeze Register 1 [dual core device

c2apb1fzr2

DBGMCU CPU2 APB1 Peripheral Freeze Register 2 [dual core device

c2apb2fzr

DBGMCU CPU2 APB2 Peripheral Freeze Register [dual core device

cr

DBGMCU Configuration Register

idcode

DBGMCU Identity Code Register

Structs

RegisterBlock

Register block

Type Definitions

APB1FZR1

DBGMCU CPU1 APB1 Peripheral Freeze Register 1

APB1FZR2

DBGMCU CPU1 APB1 Peripheral Freeze Register 2

APB2FZR

DBGMCU CPU1 APB2 Peripheral Freeze Register

C2APB1FZR1

DBGMCU CPU2 APB1 Peripheral Freeze Register 1 [dual core device

C2APB1FZR2

DBGMCU CPU2 APB1 Peripheral Freeze Register 2 [dual core device

C2APB2FZR

DBGMCU CPU2 APB2 Peripheral Freeze Register [dual core device

CR

DBGMCU Configuration Register

IDCODE

DBGMCU Identity Code Register