Module stm32wb::stm32wb55::ipcc::c1mr

Mask register CPU1

Structs

C1MR_SPEC

Mask register CPU1

R

Register C1MR reader

W

Register C1MR writer

Type Definitions

CH1FM_R

Field CH1FM reader - processor 1 Transmit channel 1 free interrupt mask

CH1FM_W

Field CH1FM writer - processor 1 Transmit channel 1 free interrupt mask

CH1OM_R

Field CH1OM reader - processor 1 Receive channel 1 occupied interrupt enable

CH1OM_W

Field CH1OM writer - processor 1 Receive channel 1 occupied interrupt enable

CH2FM_R

Field CH2FM reader - processor 1 Transmit channel 2 free interrupt mask

CH2FM_W

Field CH2FM writer - processor 1 Transmit channel 2 free interrupt mask

CH2OM_R

Field CH2OM reader - processor 1 Receive channel 2 occupied interrupt enable

CH2OM_W

Field CH2OM writer - processor 1 Receive channel 2 occupied interrupt enable

CH3FM_R

Field CH3FM reader - processor 1 Transmit channel 3 free interrupt mask

CH3FM_W

Field CH3FM writer - processor 1 Transmit channel 3 free interrupt mask

CH3OM_R

Field CH3OM reader - processor 1 Receive channel 3 occupied interrupt enable

CH3OM_W

Field CH3OM writer - processor 1 Receive channel 3 occupied interrupt enable

CH4FM_R

Field CH4FM reader - processor 1 Transmit channel 4 free interrupt mask

CH4FM_W

Field CH4FM writer - processor 1 Transmit channel 4 free interrupt mask

CH4OM_R

Field CH4OM reader - processor 1 Receive channel 4 occupied interrupt enable

CH4OM_W

Field CH4OM writer - processor 1 Receive channel 4 occupied interrupt enable

CH5FM_R

Field CH5FM reader - processor 1 Transmit channel 5 free interrupt mask

CH5FM_W

Field CH5FM writer - processor 1 Transmit channel 5 free interrupt mask

CH5OM_R

Field CH5OM reader - processor 1 Receive channel 5 occupied interrupt enable

CH5OM_W

Field CH5OM writer - processor 1 Receive channel 5 occupied interrupt enable

CH6FM_R

Field CH6FM reader - processor 1 Transmit channel 6 free interrupt mask

CH6FM_W

Field CH6FM writer - processor 1 Transmit channel 6 free interrupt mask

CH6OM_R

Field CH6OM reader - processor 1 Receive channel 6 occupied interrupt enable

CH6OM_W

Field CH6OM writer - processor 1 Receive channel 6 occupied interrupt enable