[][src]Type Definition stm32wb_pac::rcc::cr::R

type R = R<u32, CR>;

Reader of register CR

Implementations

impl R[src]

pub fn pllsai1rdy(&self) -> PLLSAI1RDY_R[src]

Bit 27 - SAI1 PLL clock ready flag

pub fn pllsai1on(&self) -> PLLSAI1ON_R[src]

Bit 26 - SAI1 PLL enable

pub fn pllrdy(&self) -> PLLRDY_R[src]

Bit 25 - Main PLL clock ready flag

pub fn pllon(&self) -> PLLON_R[src]

Bit 24 - Main PLL enable

pub fn hsepre(&self) -> HSEPRE_R[src]

Bit 20 - HSE sysclk and PLL M divider prescaler

pub fn hsebyp(&self) -> HSEBYP_R[src]

Bit 18 - HSE crystal oscillator bypass

pub fn hserdy(&self) -> HSERDY_R[src]

Bit 17 - HSE clock ready flag

pub fn hseon(&self) -> HSEON_R[src]

Bit 16 - HSE clock enabled

pub fn hsikerdy(&self) -> HSIKERDY_R[src]

Bit 12 - HSI kernel clock ready flag for peripherals requests

pub fn hsiasfs(&self) -> HSIASFS_R[src]

Bit 11 - HSI automatic start from Stop

pub fn hsirdy(&self) -> HSIRDY_R[src]

Bit 10 - HSI clock ready flag

pub fn hsikeron(&self) -> HSIKERON_R[src]

Bit 9 - HSI always enable for peripheral kernels

pub fn hsion(&self) -> HSION_R[src]

Bit 8 - HSI clock enabled

pub fn msirange(&self) -> MSIRANGE_R[src]

Bits 4:7 - MSI clock ranges

pub fn msipllen(&self) -> MSIPLLEN_R[src]

Bit 2 - MSI clock PLL enable

pub fn msirdy(&self) -> MSIRDY_R[src]

Bit 1 - MSI clock ready flag

pub fn msion(&self) -> MSION_R[src]

Bit 0 - MSI clock enable