[−][src]Struct stm32wb_pac::dbgmcu::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub idcode: IDCODE,
    pub cr: CR,
    pub apb1fzr1: APB1FZR1,
    pub c2ap_b1fzr1: C2AP_B1FZR1,
    pub apb1fzr2: APB1FZR2,
    pub apb2fzr: APB2FZR,
    // some fields omitted
}

Register block

Fields

idcode: IDCODE

0x00 - MCU Device ID Code Register

cr: CR

0x04 - Debug MCU Configuration Register

apb1fzr1: APB1FZR1

0x3c - APB1 Low Freeze Register CPU1

c2ap_b1fzr1: C2AP_B1FZR1

0x40 - APB1 Low Freeze Register CPU2

apb1fzr2: APB1FZR2

0x44 - APB1 High Freeze Register CPU1

apb2fzr: APB2FZR

0x4c - APB2 Freeze Register CPU1

Implementations

impl RegisterBlock[src]

pub fn c2apb2fzr(&self) -> &C2APB2FZR[src]

0x48 - APB2 Freeze Register CPU2

pub fn c2apb2fzr_mut(&self) -> &mut C2APB2FZR[src]

0x48 - APB2 Freeze Register CPU2

pub fn c2apb1fzr2(&self) -> &C2APB1FZR2[src]

0x48 - APB1 High Freeze Register CPU2

pub fn c2apb1fzr2_mut(&self) -> &mut C2APB1FZR2[src]

0x48 - APB1 High Freeze Register CPU2

Auto Trait Implementations

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    U: TryFrom<T>, [src]

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