[−][src]Type Definition stm32wb_pac::adc::cfgr::R
type R = R<u32, CFGR>;
Reader of register CFGR
Implementations
impl R
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pub fn jqdis(&self) -> JQDIS_R
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Bit 31 - ADC group injected contexts queue disable
pub fn awdch1ch(&self) -> AWDCH1CH_R
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Bits 26:30 - ADC analog watchdog 1 monitored channel selection
pub fn jauto(&self) -> JAUTO_R
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Bit 25 - ADC group injected automatic trigger mode
pub fn jawd1en(&self) -> JAWD1EN_R
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Bit 24 - ADC analog watchdog 1 enable on scope ADC group injected
pub fn awd1en(&self) -> AWD1EN_R
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Bit 23 - ADC analog watchdog 1 enable on scope ADC group regular
pub fn awd1sgl(&self) -> AWD1SGL_R
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Bit 22 - ADC analog watchdog 1 monitoring a single channel or all channels
pub fn jqm(&self) -> JQM_R
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Bit 21 - ADC group injected contexts queue mode
pub fn jdiscen(&self) -> JDISCEN_R
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Bit 20 - ADC group injected sequencer discontinuous mode
pub fn discnum(&self) -> DISCNUM_R
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Bits 17:19 - ADC group regular sequencer discontinuous number of ranks
pub fn discen(&self) -> DISCEN_R
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Bit 16 - ADC group regular sequencer discontinuous mode
pub fn autdly(&self) -> AUTDLY_R
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Bit 14 - ADC low power auto wait
pub fn cont(&self) -> CONT_R
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Bit 13 - ADC group regular continuous conversion mode
pub fn ovrmod(&self) -> OVRMOD_R
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Bit 12 - ADC group regular overrun configuration
pub fn exten(&self) -> EXTEN_R
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Bits 10:11 - ADC group regular external trigger polarity
pub fn extsel(&self) -> EXTSEL_R
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Bits 6:9 - ADC group regular external trigger source
pub fn align(&self) -> ALIGN_R
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Bit 5 - ADC data alignement
pub fn res(&self) -> RES_R
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Bits 3:4 - ADC data resolution
pub fn dmacfg(&self) -> DMACFG_R
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Bit 1 - ADC DMA transfer configuration
pub fn dmaen(&self) -> DMAEN_R
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Bit 0 - ADC DMA transfer enable