1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186
#[doc = "Reader of register C2AHB3SMENR"] pub type R = crate::R<u32, super::C2AHB3SMENR>; #[doc = "Writer for register C2AHB3SMENR"] pub type W = crate::W<u32, super::C2AHB3SMENR>; #[doc = "Register C2AHB3SMENR `reset()`'s with value 0x0307_0000"] impl crate::ResetValue for super::C2AHB3SMENR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x0307_0000 } } #[doc = "Reader of field `FLASHSMEN`"] pub type FLASHSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `FLASHSMEN`"] pub struct FLASHSMEN_W<'a> { w: &'a mut W, } impl<'a> FLASHSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); self.w } } #[doc = "Reader of field `SRAM2SMEN`"] pub type SRAM2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `SRAM2SMEN`"] pub struct SRAM2SMEN_W<'a> { w: &'a mut W, } impl<'a> SRAM2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); self.w } } #[doc = "Reader of field `RNGSMEN`"] pub type RNGSMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `RNGSMEN`"] pub struct RNGSMEN_W<'a> { w: &'a mut W, } impl<'a> RNGSMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); self.w } } #[doc = "Reader of field `AES2SMEN`"] pub type AES2SMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `AES2SMEN`"] pub struct AES2SMEN_W<'a> { w: &'a mut W, } impl<'a> AES2SMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); self.w } } #[doc = "Reader of field `PKASMEN`"] pub type PKASMEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PKASMEN`"] pub struct PKASMEN_W<'a> { w: &'a mut W, } impl<'a> PKASMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); self.w } } impl R { #[doc = "Bit 25 - Flash interface clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn flashsmen(&self) -> FLASHSMEN_R { FLASHSMEN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 24 - SRAM2a and SRAM2b memory interface clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn sram2smen(&self) -> SRAM2SMEN_R { SRAM2SMEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 18 - True RNG clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn rngsmen(&self) -> RNGSMEN_R { RNGSMEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - AES2 accelerator clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn aes2smen(&self) -> AES2SMEN_R { AES2SMEN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - PKA accelerator clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn pkasmen(&self) -> PKASMEN_R { PKASMEN_R::new(((self.bits >> 16) & 0x01) != 0) } } impl W { #[doc = "Bit 25 - Flash interface clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn flashsmen(&mut self) -> FLASHSMEN_W { FLASHSMEN_W { w: self } } #[doc = "Bit 24 - SRAM2a and SRAM2b memory interface clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn sram2smen(&mut self) -> SRAM2SMEN_W { SRAM2SMEN_W { w: self } } #[doc = "Bit 18 - True RNG clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn rngsmen(&mut self) -> RNGSMEN_W { RNGSMEN_W { w: self } } #[doc = "Bit 17 - AES2 accelerator clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn aes2smen(&mut self) -> AES2SMEN_W { AES2SMEN_W { w: self } } #[doc = "Bit 16 - PKA accelerator clocks enable during CPU2 sleep modes"] #[inline(always)] pub fn pkasmen(&mut self) -> PKASMEN_W { PKASMEN_W { w: self } } }