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#[doc = "Reader of register CR"] pub type R = crate::R<u32, super::CR>; #[doc = "Writer for register CR"] pub type W = crate::W<u32, super::CR>; #[doc = "Register CR `reset()`'s with value 0"] impl crate::ResetValue for super::CR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `BIAS`"] pub type BIAS_R = crate::R<u8, u8>; #[doc = "Write proxy for field `BIAS`"] pub struct BIAS_W<'a> { w: &'a mut W, } impl<'a> BIAS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5); self.w } } #[doc = "Reader of field `DUTY`"] pub type DUTY_R = crate::R<u8, u8>; #[doc = "Write proxy for field `DUTY`"] pub struct DUTY_W<'a> { w: &'a mut W, } impl<'a> DUTY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 2)) | (((value as u32) & 0x07) << 2); self.w } } #[doc = "Reader of field `VSEL`"] pub type VSEL_R = crate::R<bool, bool>; #[doc = "Write proxy for field `VSEL`"] pub struct VSEL_W<'a> { w: &'a mut W, } impl<'a> VSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `LCDEN`"] pub type LCDEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `LCDEN`"] pub struct LCDEN_W<'a> { w: &'a mut W, } impl<'a> LCDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } #[doc = "Reader of field `MUX_SEG`"] pub type MUX_SEG_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MUX_SEG`"] pub struct MUX_SEG_W<'a> { w: &'a mut W, } impl<'a> MUX_SEG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `BUFEN`"] pub type BUFEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `BUFEN`"] pub struct BUFEN_W<'a> { w: &'a mut W, } impl<'a> BUFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); self.w } } impl R { #[doc = "Bits 5:6 - Bias selector"] #[inline(always)] pub fn bias(&self) -> BIAS_R { BIAS_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bits 2:4 - Duty selection"] #[inline(always)] pub fn duty(&self) -> DUTY_R { DUTY_R::new(((self.bits >> 2) & 0x07) as u8) } #[doc = "Bit 1 - Voltage source selection"] #[inline(always)] pub fn vsel(&self) -> VSEL_R { VSEL_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - LCD controller enable"] #[inline(always)] pub fn lcden(&self) -> LCDEN_R { LCDEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 7 - Mux segment enable"] #[inline(always)] pub fn mux_seg(&self) -> MUX_SEG_R { MUX_SEG_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Voltage output buffer enable"] #[inline(always)] pub fn bufen(&self) -> BUFEN_R { BUFEN_R::new(((self.bits >> 8) & 0x01) != 0) } } impl W { #[doc = "Bits 5:6 - Bias selector"] #[inline(always)] pub fn bias(&mut self) -> BIAS_W { BIAS_W { w: self } } #[doc = "Bits 2:4 - Duty selection"] #[inline(always)] pub fn duty(&mut self) -> DUTY_W { DUTY_W { w: self } } #[doc = "Bit 1 - Voltage source selection"] #[inline(always)] pub fn vsel(&mut self) -> VSEL_W { VSEL_W { w: self } } #[doc = "Bit 0 - LCD controller enable"] #[inline(always)] pub fn lcden(&mut self) -> LCDEN_W { LCDEN_W { w: self } } #[doc = "Bit 7 - Mux segment enable"] #[inline(always)] pub fn mux_seg(&mut self) -> MUX_SEG_W { MUX_SEG_W { w: self } } #[doc = "Bit 8 - Voltage output buffer enable"] #[inline(always)] pub fn bufen(&mut self) -> BUFEN_W { BUFEN_W { w: self } } }