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#[doc = "Reader of register CCR3"] pub type R = crate::R<u32, super::CCR3>; #[doc = "Writer for register CCR3"] pub type W = crate::W<u32, super::CCR3>; #[doc = "Register CCR3 `reset()`'s with value 0"] impl crate::ResetValue for super::CCR3 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `MEM2MEM`"] pub type MEM2MEM_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MEM2MEM`"] pub struct MEM2MEM_W<'a> { w: &'a mut W, } impl<'a> MEM2MEM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); self.w } } #[doc = "Reader of field `PL`"] pub type PL_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PL`"] pub struct PL_W<'a> { w: &'a mut W, } impl<'a> PL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | (((value as u32) & 0x03) << 12); self.w } } #[doc = "Reader of field `MSIZE`"] pub type MSIZE_R = crate::R<u8, u8>; #[doc = "Write proxy for field `MSIZE`"] pub struct MSIZE_W<'a> { w: &'a mut W, } impl<'a> MSIZE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10); self.w } } #[doc = "Reader of field `PSIZE`"] pub type PSIZE_R = crate::R<u8, u8>; #[doc = "Write proxy for field `PSIZE`"] pub struct PSIZE_W<'a> { w: &'a mut W, } impl<'a> PSIZE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8); self.w } } #[doc = "Reader of field `MINC`"] pub type MINC_R = crate::R<bool, bool>; #[doc = "Write proxy for field `MINC`"] pub struct MINC_W<'a> { w: &'a mut W, } impl<'a> MINC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `PINC`"] pub type PINC_R = crate::R<bool, bool>; #[doc = "Write proxy for field `PINC`"] pub struct PINC_W<'a> { w: &'a mut W, } impl<'a> PINC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); self.w } } #[doc = "Reader of field `CIRC`"] pub type CIRC_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CIRC`"] pub struct CIRC_W<'a> { w: &'a mut W, } impl<'a> CIRC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); self.w } } #[doc = "Reader of field `DIR`"] pub type DIR_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DIR`"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `TEIE`"] pub type TEIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TEIE`"] pub struct TEIE_W<'a> { w: &'a mut W, } impl<'a> TEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `HTIE`"] pub type HTIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `HTIE`"] pub struct HTIE_W<'a> { w: &'a mut W, } impl<'a> HTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `TCIE`"] pub type TCIE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `TCIE`"] pub struct TCIE_W<'a> { w: &'a mut W, } impl<'a> TCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `EN`"] pub type EN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `EN`"] pub struct EN_W<'a> { w: &'a mut W, } impl<'a> EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn mem2mem(&self) -> MEM2MEM_R { MEM2MEM_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 12:13 - Channel priority level"] #[inline(always)] pub fn pl(&self) -> PL_R { PL_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Memory size"] #[inline(always)] pub fn msize(&self) -> MSIZE_R { MSIZE_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Peripheral size"] #[inline(always)] pub fn psize(&self) -> PSIZE_R { PSIZE_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Memory increment mode"] #[inline(always)] pub fn minc(&self) -> MINC_R { MINC_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Peripheral increment mode"] #[inline(always)] pub fn pinc(&self) -> PINC_R { PINC_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode"] #[inline(always)] pub fn circ(&self) -> CIRC_R { CIRC_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Data transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Transfer error interrupt enable"] #[inline(always)] pub fn teie(&self) -> TEIE_R { TEIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Half transfer interrupt enable"] #[inline(always)] pub fn htie(&self) -> HTIE_R { HTIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Transfer complete interrupt enable"] #[inline(always)] pub fn tcie(&self) -> TCIE_R { TCIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn en(&self) -> EN_R { EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn mem2mem(&mut self) -> MEM2MEM_W { MEM2MEM_W { w: self } } #[doc = "Bits 12:13 - Channel priority level"] #[inline(always)] pub fn pl(&mut self) -> PL_W { PL_W { w: self } } #[doc = "Bits 10:11 - Memory size"] #[inline(always)] pub fn msize(&mut self) -> MSIZE_W { MSIZE_W { w: self } } #[doc = "Bits 8:9 - Peripheral size"] #[inline(always)] pub fn psize(&mut self) -> PSIZE_W { PSIZE_W { w: self } } #[doc = "Bit 7 - Memory increment mode"] #[inline(always)] pub fn minc(&mut self) -> MINC_W { MINC_W { w: self } } #[doc = "Bit 6 - Peripheral increment mode"] #[inline(always)] pub fn pinc(&mut self) -> PINC_W { PINC_W { w: self } } #[doc = "Bit 5 - Circular mode"] #[inline(always)] pub fn circ(&mut self) -> CIRC_W { CIRC_W { w: self } } #[doc = "Bit 4 - Data transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 3 - Transfer error interrupt enable"] #[inline(always)] pub fn teie(&mut self) -> TEIE_W { TEIE_W { w: self } } #[doc = "Bit 2 - Half transfer interrupt enable"] #[inline(always)] pub fn htie(&mut self) -> HTIE_W { HTIE_W { w: self } } #[doc = "Bit 1 - Transfer complete interrupt enable"] #[inline(always)] pub fn tcie(&mut self) -> TCIE_W { TCIE_W { w: self } } #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn en(&mut self) -> EN_W { EN_W { w: self } } }