[−][src]Module stm32wb_pac::usart1
Universal synchronous asynchronous receiver transmitter
Modules
| brr | Baud rate register |
| cr1 | Control register 1 |
| cr2 | Control register 2 |
| cr3 | Control register 3 |
| gtpr | Guard time and prescaler register |
| icr | Interrupt flag clear register |
| isr | Interrupt & status register |
| presc | Prescaler register |
| rdr | Receive data register |
| rqr | Request register |
| rtor | Receiver timeout register |
| tdr | Transmit data register |
Structs
| RegisterBlock | Register block |
Type Definitions
| BRR | Baud rate register |
| CR1 | Control register 1 |
| CR2 | Control register 2 |
| CR3 | Control register 3 |
| GTPR | Guard time and prescaler register |
| ICR | Interrupt flag clear register |
| ISR | Interrupt & status register |
| PRESC | Prescaler register |
| RDR | Receive data register |
| RQR | Request register |
| RTOR | Receiver timeout register |
| TDR | Transmit data register |