Constant stm32ral::stm32g0::stm32g050::tim1::BDTR::LOCK::RW::B_0x2

pub const B_0x2: u32 = 0b10;

0b10: LOCK Level 2 = LOCK Level 1 + CC Polarity bits (CCxP/CCxNP bits in TIMx_CCER register, as long as the related channel is configured in output through the CCxS bits) as well as OSSR and OSSI bits can no longer be written.