Constant stm32ral::stm32g0::peripherals::tim1_v2::CR2::MMS2::RW::B_0x0

pub const B_0x0: u32 = 0b0000;

0b0000: Reset - the UG bit from the TIMx_EGR register is used as trigger output (TRGO2). If the reset is generated by the trigger input (slave mode controller configured in reset mode), the signal on TRGO2 is delayed compared to the actual reset.