Constant stm32ral::stm32g0::peripherals::adc_v2::ADC_CFGR2::CKMODE::RW::B_0x3

pub const B_0x3: u32 = 0b11;

0b11: PCLK (Synchronous clock mode). This configuration must be enabled only if PCLK has a 50% duty clock cycle (APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle)