Constant stm32ral::stm32f0::stm32f0x1::dbgmcu::APB1_FZ::TIM3_counter_stopped_when_core_is_halted::mask [−][src]
pub const mask: u32 = 1 << offset; // 0x0000_0010u32Expand description
Mask (1 bit: 1 << 4)